ON Semiconductor

ON Semiconductor NB7V72MMNG, Crosspoint Switch 2 x 2 2.5 V, 3.3 V, 16-Pin QFN

NB7V586MMNG, Clock Multiplexer CML, LVDS, LVPECL CML, 32-Pin QFN

QFN-32

Maximum Input Clock Frequency > 10 GHz, typical; 260 ps Typical Propagation Delay; 35 ps Typical Rise and Fall Times; Differential CML Outputs, 400 mV peaktopeak, typical; Internal 50-ohm Input Termination Resistors; Random Clock Jitter < 0.8 ps RMS; 40C to +85C Ambient Operating Temperature

NB6LQ572MNG, Clock Generator CML, LVDS, LVPECL LVPECL 4-Input, 32-Pin QFN

QFN-32

NB7L585MNG, Clock Generator CML, LVDS, LVPECL LVPECL, 32-Pin QFN

ON SEMICONDUCTOR - NB7L86MMNG - LOGIC GATE, MULTI-FUNCTION, QFN-16

ON Semiconductor NB6N239SMNG, Clock Divider CML, HCSL, HSTL, LVDS, LVPECL LVDS 2-Input Differential 16-Pin QFN

Maximum Input Clock Frequency > 10 GHz, typical; 260 ps Typical Propagation Delay; 35 ps Typical Rise and Fall Times; Differential CML Outputs, 400 mV peaktopeak, typical; Internal 50-ohm Input Termination Resistors; Random Clock Jitter < 0.8 ps RMS; 40C to +85C Ambient Operating Temperature

Maximum Data Rate > 10Gbps; Maximum Clock Frequency > 7GHz; Random Clock Jitter < 0.5ps RMS; 30ps typical output rise & fall times; Differential CML Outputs; 2.5V or 3.3V Operating Voltage; Internal 50-ohm Input Termination; Industrial Temperature Range

NB7L585RMNG, Clock Generator CML, LVDS, LVPECL RSECL, 32-Pin QFN

NB7L14MNHTBG, Clock Generator LVPECL/CML/LVCMOS/LVTTL/LVDS LVPECL, 16-Pin QFN

Maximum Data Rate > 10Gbps; Maximum Clock Frequency > 7GHz; Random Clock Jitter < 0.5ps RMS; 30ps typical output rise & fall times; Differential CML Outputs; 2.5V or 3.3V Operating Voltage; Internal 50-ohm Input Termination; Industrial Temperature Range

Input Data Rate > 11 Gb/s Typical; Data Dependent Jitter < 15 ps; Maximum Input Clock Frequency > 8 GHz Typical; Random Clock Jitter < 0.8 ps RMS; Low Skew 1:2 LVPECL Outputs, < 10 ps max; 4:1 MultiLevel Mux Inputs, Accepts LVPECL, CML LVDS; 150 ps Typical Propagation Delay; Differential LVPECL Outputs, 750 mV Peak-to-Peak, Typical; Operating Range: VCC = 2.375 V to 3.6 V; Internal 50-ohm Input Termination Resistors; VREFAC Reference Output; 40C to +85C Ambient Operating Temperature

Input Data Rate > 12 Gb/s Typical; Data Dependent Jitter < 20 ps; Maximum Input Clock Frequency > 8 GHz Typical; Random Clock Jitter < 0.8 ps RMS; Low Skew 1:8 CML Outputs, < 25 ps max; Multi-Level Inputs, accepts LVPECL, CML, LVDS; Differential CML Outputs, 400 mV Peak-to-Peak, Typical; Operating Range: VCC = 2.375 V to 3.6 V, GND = 0 V; Internal Input Termination Resistors, 50-ohm; VREFAC Reference Output; -40C to +85C Ambient Operating TemperaturerPas

Maximum Input Clock Frequency > 2.0 GHz; Maximum Input Data Rate > 2.5 Gb/s; 1 ps Maximum RMS Clock Jitter; Typically 10 ps of Data Dependent Jitter; 380 ps Typical Propagation Delay; 120 ps Typical Rise and Fall Times; Pb-Free

Use the download button to access the NB6L611MNG schematic symbol, PCB footprint, and 3D model.

NB6LQ572MMNG, Clock Generator CML, LVDS, LVPECL CML 4-Input, 32-Pin QFN

ON Semiconductor NB7HQ14MMNHTBG Clock Generator 16-Pin QFN

Maximum Input Clock Frequency > 2.0 GHz; Maximum Input Data Rate > 2.5 Gb/s; 1 ps Maximum of RMS Clock Jitter; Typically 10 ps of Data Dependent Jitter; 380 ps Typical Propagation Delay; 120 ps Typical Rise and Fall Times; These devices are available in Pb-free package(s). Specifications herein

175 C Operating Junction Temperature; Low Forward Drop; Ultrafast 35 and 60 Nanosecond Recovery Time; High Voltage Capability to 600 Volts; Low Leakage Specified @ 150 C Case Temperature; Lead Temperature for Soldering Purposes: 260 C Max. for 10 Seconds; Case: Epoxy, Molded; Current Derating Specified @ Both Case and Ambient Temperatures Mechanical Characteristics:; Finish: All External Surfaces Corrosion Resistant and Terminal Leads are Readily Solderable; Weight: 1.9 grams (approximately); AEC-Q101 Quali

• Ultrafast 25 ns, 50 ns and 75 ns Recovery Times • 175°C Operating Junction Temperature • Low Forward Voltage • Low Leakage Current • High Temperature Glass Passivated Junction • Reverse Voltage to 600 V • Shipped in Plastic Bags, 500 per Bag • Available in Tape and Reel, 1500 per Reel, by Adding a “RLG’’ Suffix to the Part Number • MUR460 available in Fan Fold Ammo Pak, 1000 per Box, by adding a “FFG” suffix to the part number • These are Pb−Free Packages*

Linearity +/- 20ps Maximum ; Maximum Input Clock Frequency >1.5 GHz Typical; Programmable Range: 0 ns to 6 ns Dual Mode; Programmable Range: 0 ns to 11 ; 11 ps Delay Increments; INx/INxb Inputs Accept LVPECL, LVDS Levels; 3-Wire Serial Data Interface (SDI)

Input Clock Frequency > 2.0GHz; Input Data Rate > 2.5Gb/s; 1 ps Maximum RMS Clock Jitter; Typically 10 ps of Data Dependent Jitter; 380 ps Typical Propagation Delay; 120 ps Typical Rise and Fall Times; Single Power Supply Vcc=2.5V ± 5%; Pb-Free

Linearity +/- 20ps Maximum ; Maximum Input Clock Frequency >1.5 GHz Typical; Programmable Range: 0 ns to 6 ns Dual Mode; Programmable Range: 0 ns to 11 ns Entended Mode;; Delay Range: 3.2 ns to 9.0 ns Dual Mode; Delay Range: 6.2 ns to 17.8 ns Extended Mode; 11 ps Delay Increments; INx/INxb Inputs Accept LVPECL, LVDS Levels; 3-Wire Serial Data Interface (SDI)

Serial Load Capability; Flexible Input; Exceeds Bellcore and ITU Jitter Generation Specification; Performs Precision Clock Generation and Synthesis from a Single 27 MHz Crystal Reference; Output Enable; Fully Integrated Phase Lock Loop with Internal Loop Filter; PLL Lock Detect Output

QFN-16

Maximum Input Clock Frequency > 2.0 GHz; Maximum Input Data Rate > 2.5 Gb/s; Typically 1 ps of RMS Clock Jitter; Typically 10 ps of Data Dependent Jitter; 550 ps Typical Propagation Delay; 150 ps Typical Rise and Fall Times; Differential Open Collector CML Outputs

QFN-16

TSSOP-8

LEAD FREE, SOIC-8

NB6L11DG is a low-skew differential clock driver IC in the NECL 6L family by ON Semiconductor, operating in NECL mode with VEE from -2.375 V to -3.465 V and differential inputs. Key specs include 8-pin SOIC package, differential input conditioning, and sub-nanosecond output skew. Available from authorized distributors with worldwide shipping.

NB4N111KMNG, Clock Buffer CML, LVDS, LVMOS, LVPECL, LVTTL HCSL, LVDS, 1-Input, 32-Pin QFN

7 X 7 MM, LEAD FREE, PLASTIC, LQFP-32

ON Semiconductor NB4L339MNG, Clock Divider CML, LVDS, LVPECL LVPECL 2-Input Differential 32-Pin QFN

QFN-52

TSSOP-28

VDD core supply voltage can be set to 3.3 V, 2.5 V or 1.8 V; VDDO output supply voltage can be set to 3.3 V, 2.5 V, or 1.8 V, with the constraint that VDD >/= VDDO; 250 MHz Maximum Clock Frequency; Accepts LVCMOS, LVTTL Clock Inputs; 12 LVCMOS Clock Outputs; 150 ps Max. Skew Between Outputs; Temp. Range 40C to +85C; 32pin LQFP and QFN Packages; Synchronous Clock Enable

Maximum Input Clock Frequency > 4 GHz Typical; 330 ps Typical Propagation Delay; 145 ps Typical Rise and Fall Times; Differential LVPECL Outputs, 750 mV PeaktoPeak, Typical; Operating Range: VCC = 2.375 V to 5.5 V with VEE = 0 V

ON SEMICONDUCTOR - NB3N551DR2G - Fanout Buffer, 180 MHz, 3 V to 5.5 V, 4 Outputs, SOIC-8

12 Differential Clock Output Pairs @ 0.7 V; Low−Power NMOS Push−Pull Compatible Outputs for NB3W1200L; Optimized 100 MHz and 133 MHz Operating Frequencies to Meet The Next Generation PCIe Gen 2/Gen 3/ Gen 4 and Intel QPI & UPI Phase Jitter; DB1200ZL Compliant; 3.3 V ±5% Supply Voltage Operation; Fixed−Feedback for Lowest Input−To−Output Delay Variation; SMBus Programmable Configurations to Allow Multiple Buffers in a Single Control Network; PLL Bypass Configurable for PLL or Fanout Operation; Programmable P

Maximum Input Clock Frequency > 3.5 GHz Typical; Maximum Input Data Frequency > 5 Gb/s Typical; 220 ps Typical Propagation Delay ; 65 ps Typical Rise and Fall Times ; CML Output with Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V; CML Output Level (400 mV Peak-to-Peak Output), Differential Output Only; 50 Ω Internal Input and Output Termination Resistors; Functionally Compatible with Existing 2.5 V / 3.3 V LVEL, LVEP, EP, and SG Devices; Pb-Free Packages are Available

HCSL Differential Output; Typical Period RMS jitter of 1.5 ps; Uses 25 MHz Fundamental Mode Parallel Resonant Crystal; Industrial Temperature Range -40C to +85C; Operating Range 3.3 V +/- 10%; PCIe Gen1, Gen2, Gen3, Gen4, QPI, UPI Jitter Compliant

SOIC-8

TSSOP-24

Typical TIE RMS jitter of 2.5 ps; Uses 25 MHz Fundamental Mode Parallel Resonant Crystal; HCSL Differential Output; Operating Range 3.3 V 5%; Industrial Temperature Range -40C to +85C; PCIe Clock Generation Gen 1, Gen 2, Gen 3, Gen 4