NB6L11DG ON Semiconductor Integrated Circuit (Small Outline Packages) In Stock
NB6L11DG is a low-skew differential clock driver IC in the NECL 6L family by ON Semiconductor, operating in NECL mode with VEE from -2.375 V to -3.465 V and differential inputs. Key specs include 8-pin SOIC package, differential input conditioning, and sub-nanosecond output skew. Available from authorized distributors with worldwide shipping.
- Manufacturer
- ON Semiconductor
- Package
- Small Outline Packages
- Pin Count
- 8
- Lifecycle
- OBSOLETE
- Datasheet
- NB6L11DG Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $5.8209(MOQ 1)
- Temp Range
- -40.0°C to 85.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- NECL-mode low-skew clock driver with differential input conditioning, supporting VEE supply range of -2.375 V to -3.465 V for ECL-compatible clock distribution
- 8-pin SOIC (R-PDSO-G8) package with 2-day factory lead time enabling rapid prototyping and production procurement for high-speed digital clock tree designs
- RoHS-compliant (Pb-free, JESD-609 e3) construction in the ON Semiconductor 6L family providing drop-in compatibility with existing NECL clock-buffer footprints
Applications
The NB6L11DG is used in high-speed digital clock distribution networks where low-skew NECL differential clock signals must be fanned out to multiple loads in telecommunications, networking, and data-storage equipment. Its differential input conditioning and NECL mode operation with VEE down to -3.465 V make it suited for 10 Gbps line-card clock trees and high-frequency test instruments requiring sub-nanosecond skew between clock outputs.
Specifications
| Pbfree Code | Yes |
| Manufacturer Package Code | 751-07 |
| Factory Lead Time | 2Days |
| YTEOL | 0 |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.465V |
| Family | 6L |
| Input Conditioning | DIFFERENTIAL |
| JESD-30 Code | R-PDSO-G8 |
| JESD-609 Code | e3 |
| Logic IC Type | LOW SKEW CLOCK DRIVER |
| Number of Functions | 1 |
| Number of True Outputs | 2 |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | SOP8,.25 |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE |
| Peak Reflow Temperature (Cel) | 260 |
| Power Supply Current-Max (ICC) | 20mA |
| Prop. Delay@Nom-Sup | 0.22ns |
| Propagation Delay (tpd) | 0.2ns |
| Qualification Status | Not Qualified |
| Same Edge Skew-Max (tskwd) | 0.015ns |
| Supply Voltage-Max (Vsup) | 3.465V |
| Supply Voltage-Min (Vsup) | 2.375V |
| Supply Voltage-Nom (Vsup) | 2.5V |
| Surface Mount | YES |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | Tin (Sn) |
| Terminal Form | GULL WING |
| Terminal Pitch | 1.27mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| HTS Code | 8542.39.00.60 |
Alternate & Equivalent Parts
No known alternates. Submit an RFQ and our team can suggest alternatives.
Frequently Asked Questions
What supply voltage range does NB6L11DG support in NECL mode for a -3.3 V ECL clock distribution design?
The NB6L11DG operates in NECL mode with a VEE supply ranging from -2.375 V to -3.465 V while VCC is held at 0 V. This range covers the standard -3.3 V ECL supply used in telecommunications clock distribution, making the part a drop-in solution for NECL-compatible 8-pin SOIC clock driver designs.
How does the differential input architecture of NB6L11DG reduce clock noise in multi-load systems?
NB6L11DG uses differential input conditioning to reject common-mode noise injected on the clock input lines, ensuring that only the differential signal drives the output buffers. This improves jitter performance in clock trees serving multiple loads, where power-supply noise and ground bounce from parallel switching loads would otherwise degrade timing accuracy in sub-nanosecond-skew distribution networks.
How quickly can NB6L11DG be procured and what is the package footprint for PCB layout?
NB6L11DG has a 2-day factory lead time and is available in the standard 8-pin SOIC package (R-PDSO-G8), which occupies approximately 5 mm × 4 mm on the PCB. This compact footprint and short lead time make the part suitable for both prototype builds and production runs of high-speed clock distribution boards.
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About ON Semiconductor
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| Qty. | Unit Price | Ext. Price |
|---|---|---|
| 1+ | $12.3800 | $12.38 |
| 30+ | $6.7165 | $201.50 |
| 39+ | $6.4926 | $253.21 |
| 52+ | $5.8209 | $302.69 |
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