ON Semiconductor

Pin-for-Pin Replacement for CD4017B; Fully Static Operation; Divide-by-N Counting; Carry Out Output for Cascading; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range; Supply Voltage Range = 3.0 Vdc to 18 Vdc; DC Clock Input Circuit Allows Slow Rise Times; Triple Diode Protection on All Inputs; Pb-Free Packages are Available*

SOIC-16

Pin-for-Pin Replacement for CD4017B; Fully Static Operation; Divide-by-N Counting; Carry Out Output for Cascading; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range; Supply Voltage Range = 3.0 Vdc to 18 Vdc; DC Clock Input Circuit Allows Slow Rise Times; Triple Diode Protection on All Inputs; Pb-Free Packages are Available*

Synchronous Parallel Input/Serial Output (MC14014B); Full Static Operation; Double Diode Input Protection; "Q" Outputs from Sixth, Seventh, and Eighth Stages; MC14021B Pin-for-Pin Replacement for CD4021B; Synchronous Serial Input/Serial Output; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Asynchronous Parallel Input/Serial Output (MC14021B); MC14014B Pin-for-Pin Replacement for CD4014B; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range; Pb-Free Packa

Low Noise - 12 nV/sq. root (Cycle), f >= 1.0 kHz typical; Diode Protection on All Inputs; This Device Has Inputs and Outputs Which Do Not Have ESD Protection. Antistatic Precautions Must Be Taken.; Linearized Transfer Characteristics; Pin-for-Pin Replacements for CD4016B, CD4066B (Note improvedtransfer characteristic design causes more parasitic coupling capacitance than CD4016); For Lower RON , Use The HC4016 High-Speed CMOS Device or The MC14066B; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Pb-Free Packages

Supply Voltage Range = 3.0 Vdc to 18 Vdc; Static Operation; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range; Pin-for-Pin Replacement for CD4013B; Diode Protection on All Inputs; Logic Edge-Clocked Flip-Flop Design Logic state is retained indefinitely with clock level either high or low; information is transferred to the output only on the positive-going edge of the clock pulse; Pb-Free Packages are Available*

Supply Voltage Range = 3.0 Vdc to 18 Vdc; Static Operation; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range; Pin-for-Pin Replacement for CD4013B; Diode Protection on All Inputs; Logic Edge-Clocked Flip-Flop Design Logic state is retained indefinitely with clock level either high or low; information is transferred to the output only on the positive-going edge of the clock pulse; Pb-Free Packages are Available*

Supply Voltage Range = 3.0 Vdc to 18 Vdc; Static Operation; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range; Pin-for-Pin Replacement for CD4013B; Diode Protection on All Inputs; Logic Edge-Clocked Flip-Flop Design Logic state is retained indefinitely with clock level either high or low; information is transferred to the output only on the positive-going edge of the clock pulse; Pb-Free Packages are Available*

Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range.; Pin-for-Pin Replacements for Corresponding CD4000 Series B Suffix Devices; All Outputs Buffered; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Double Diode Protection on All Inputs Except: Triple Diode Protection on MC14011B and MC14081B; Pb-Free Packages are Available*

Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range; Pin-for-Pin Replacements for Corresponding CD4000 Series UB Suffix Devices; Linear and Oscillator Applications; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Double Diode Protection on All Inputs; Pb-Free Packages are Available*

Double Diode Protection on All Inputs; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range.; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Pin-for-Pin Replacements for Corresponding CD4000 Series B Suffix Devices; All Outputs Buffered; Pb-Free Packages are Available*

Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range.; Pin-for-Pin Replacements for Corresponding CD4000 Series B Suffix Devices; All Outputs Buffered; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Double Diode Protection on All Inputs Except: Triple Diode Protection on MC14011B and MC14081B; Pb-Free Packages are Available*

1.1 GHz Toggle Frequency; Supply Voltage 2.7 V to 5.5 Vdc; Low Power 3.0 mA Typical; Operating Temperature -40 to 85°C; Divide by 2, 4 or 8 Selected by SW1 and SW2 Pins; On-Chip Termination; Pb-Free Packages are Available

Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range.; Pin-for-Pin Replacements for Corresponding CD4000 Series B Suffix Devices; All Outputs Buffered; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Double Diode Protection on All Inputs Except: Triple Diode Protection on MC14011B and MC14081B; Pb-Free Packages are Available*

Use the download button to access the MC12026ADG schematic symbol, PCB footprint, and 3D model.

Use the download button to access the MC12080DG schematic symbol, PCB footprint, and 3D model.

PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V; 190 ps Propagation Delay; ESD Protection: > 1 KV HBM, > 100 V MM; NECL Mode Operating Range: VCC= 0 V with VEE= -4.2 V to -5.7 V; Internal Input Pulldown Resistors; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL 94 V-0 @ 0.125 in, Oxygen Index 28 to 34; Transistor Count = 47 devices; Pb-Free Packages are Available

SO-16

TSSOP-20

PECL Mode Operating Range: VCC= 3.0 V to 5.5 V with VEE= 0 V; 350ps Typical Propagation Delay; NECL Mode Operating Range: VCC= 0 V with VEE= –3.0 V to –5.5 V; Q Output will default LOW with inputs open or at VEE; Maximum Frequency > 4 GHz Typical; Open Input Default State; Safety Clamp on Inputs; Pb-Free Packages are Available

Q Output will default LOW with inputs open or at VEE; 1.6V (5V) and 1.4V (3.3V) VOUTpp Swing; PECL Mode Operating Range: VCC= 3.0 V to 5.5 V with VEE= 0 V; Maximum Frequency > 2 Ghz Typical; NECL Mode Operating Range: VCC= 0 V with VEE= -3.0 V to -5.5 V; 310ps Typical Propagation Delay; Open Input Default State; Safety Clamp on Inputs; Pb-Free Packages are Available

VBB Outputs; Q Output will default LOW with inputs open or at VEE; 360ps Typical Propagation Delays; Separate and Common Select; NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V; Maximum Frequency > 3 GHz Typical; PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V; Open Input Default State; Safety Clamp on Inputs; Pb-Free Packages are Available

NECL Mode Operating Range: VCC= 0 V with VEE= -3.0 V to -5.5 V; PECL Mode Operating Range: VCC= 3.0 V to 5.5 V with VEE= 0 V ; Maximum Frequency > 3 GHz Typical; 220ps Typical Propagation Delay; Open Input Default State; Safety Clamp on Inputs; Q Outputs Will Default LOW with Inputs Open or at VEE; Pb-Free Packages are Available

5 X 5 MM, 1 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, QFN-32

LEAD FREE, SOIC-8

SOIC-8

Use the download button to access the MC10EP32DG schematic symbol, PCB footprint, and 3D model.

Use the download button to access the MC10EL32DG schematic symbol, PCB footprint, and 3D model.

Use the download button to access the MC10EL04DG schematic symbol and PCB footprint.

NECL Mode Operating Range: VCC= 0 V with VEE= -4.2 V to -5.7 V; PECL Mode Operating Range: VCC= 4.2 V to 5.7 with VEE= 0 V; ESD Protection: > 1 KV HBM, > 100 V MM; 5ps Skew Between Outputs; 265ps Propagation Delay; Internal Input Pulldown Resistors; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34; Transistor Count = 44 devices; Pb-Free Packages ar

Q Output will default LOW with inputs open or at GND; 1.5ns Typical Propagation Delay; Maximum Operating Frequency > 275MHz; 24mA LVTTL Outputs; Operating Range: VCC= 3.0 V to 3.6 V with GND = 0 V; Open Input Default State; Pb-Free Packages are Available

LCC-28

ON Semiconductor MC10E154FNG 1bit-Bit Latch, Transparent D Type, ECL, 28-Pin PLCC

230ps Propagation Delay; ESD Protection: > 1 KV HBM, > 100 V MM; NECL Mode Operating Range: VCC= 0 V with VEE= -4.2 V to -5.7 V; PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V; Internal Input Pulldown Resistors; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34; Transistor Count = 46 devices; Pb-Free Packages are Available

MC10E211FNG, Clock Distribution Circuit ECL ECL, 2-Input, 28-Pin PLCC

ESD Protection: >4 KV HBM, >200 V MM; 2.6 GHz Typical Maximum Frequency; 510ps Propagation Delay; The 100 Series Contains Temperature Compensation; PECL Mode Operating Range: VCC= 3.0 V to 3.8 V with VEE= 0 V; NECL Mode Operating Range: VCC= 0 V with VEE = -3.0 V to -3.8 V; Internal Input Pulldown Resistors; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index

MC100LVEP111MNG, ECL, HSTL, PECL Clock Driver ECL, PECL, 2-Input Maximum of 3 GHz, 32-Pin QFN

Q Output will default LOW with inputs open or at GND; 24mA TTL outputs; Maximum Frequency > 275 MHz Typical; 1.1ns Typical Propagation Delay; Operating Range: VCC = 3.0 V to 3.6 V; VEE = -5.5 V to -3.0 V; GND = 0 V; VBB Output; Open Input Default State; Safety Clamp on Inputs; Pb-Free Packages are Available

TSSOP-8

580 ps Typical Propagation Delays; ESD Protection: >2 KV HBM; 1100MHz Flip-Flop Toggle Frequency; The 100 Series Contains Temperature Compensation; PECL Mode Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V; NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -3.8 V; Internal Input Pulldown Resistors; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Flammability Rating: UL-94 code V-0 @ 1Ǟ", Oxygen Index 28 to 34; Transistor Count = 313 devices; Pb-Free Packages are Available

SOIC-20

<100ps Output-to-Output Skew; Flow Through Pinouts; ESD Protection: >4 KV HBM, >200 V MM; The 100 Series Contains Temperature Compensation; 350ps Typical Propagation Delay; LVPECL Operating Range: VCC= 3.15 V to 3.45 V with GND= 0 V; When Unused TTL Input is left Open, Q Output will Default High; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D; Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34; Tr

ON Semiconductor MC100LVEL30DWG Triple D Type Flip Flop IC, ECL, 3.3 → 3.8 V, 20-Pin SOIC

Open Input Default State; Q Output will default LOW with inputs open or at VEE; Maximum Frequency > 3 GHz Typical; PECL Mode Operating Range: VCC= 3.0 V to 5.5 V with VEE= 0 V; 340ps Typical Propagation Delay; NECL Mode Operating Range: VCC= 0 V with VEE= –3.0 V to –5.5 V; Pb-Free Packages are Available

LVPECL Operating Range: LVCC = 3.0 V to 3.8 V; ESD Protection: >2 KV HBM, >200 V MM; The 100 Series Contains Temperature Compensation; 500ps Propagation Delays; 5V and 3.3V Supplies Required; PECL Operating Range: VCC = 4.5 V to 5.5 V; Internal Input Pulldown Resistors; Q Output will Default LOW with Inputs Open or < GND+1.3 V; Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34; Transistor Count = 247 devices; Pb-Free Packages are Availa

ON Semiconductor MC100H680FNG, 4-channel Transceiver, 3 State, Non-Inverting, 4.2 → 5.5 V, 28-Pin PLCC

1.4ns Typical Propagation Delay; VBB Output; Maximum Frequency > 275 MHz Typical; 24mA TTL outputs; New Differential Input Common Mode Range; The 100 Series Contains Temperature Compensation; LVPECL/LVDS/CML Inputs, LVTTL/LVCMOS Outputs