Integrated Circuit

NB7VQ572MMNG, Clock Generator CML, LVDS, LVPECL CML, 32-Pin QFN

QFN-16

ON Semiconductor NBC12439AFNG, PLL Clock Synthesizer, 28-Pin PLCC

6.3 V to 40 V Input Voltage; Integrated 1 A / 50 mΩ MOSFET; Up to 1.4 MHz Operation; Short LED Shutdown Protection; Thermal Shutdown Protection; No Control Loop Compensation Required; Externally adjustable LED current; Dedicated EN/DIM Pin; Supports all ceramic or capacitor-less output

Obsolete - Data Switch, 6-Differential Channel 1:2 Switch for PCIe 2.0 and Display Port 1.1

NB7VQ58MMNHTBG, Clock Translator CML CML, 1-Input, 16-Pin QFN

Maximum Input Clock Frequency > 10GHz Typical; Random Clock Jitter < 0.8ps RMS; 30ps Typical Rise and Fall Times ; Differential CML Outputs, 400mV peak-to-peak, typical; Operating Range: VCC = 1.71V to 2.625V with VEE = 0V; Internal 50-ohm Input Termination Resistors; -40C to +85C Ambient Operating Temperature; Instrumentation

ON Semiconductor NB7VPQ16MMNHTBG, Cable Transceiver 12.5Gbit/s, 16-Pin QFN

Maximum Input Data Rate > 6.5 Gb/s; Data Dependent Jitter < 15 ps pk-pk; Maximum Input Clock Frequency > 5 GHz.; Random Clock Jitter < 0.8 ps RMS; Internal 50-ohm Input Termination Resistors; -40C to +85C Ambient Operating TemperaturerPas; Gigabit Ethernet data/clock routing; SONET data/clocking routingSONET data/clocking routing; Switch fabric clock routing; Redundant switchover; Backplane redundancy

NB7V58MMNHTBG, Clock Translator CML CML, 1-Input, 16-Pin QFN

NB7V58MMNG, Clock Translator CML CML, 1-Input, 16-Pin QFN

ON Semiconductor NB7V72MMNG, Crosspoint Switch 2 x 2 2.5 V, 3.3 V, 16-Pin QFN

NB7V586MMNG, Clock Multiplexer CML, LVDS, LVPECL CML, 32-Pin QFN

QFN-32

Maximum Input Clock Frequency > 10 GHz, typical; 260 ps Typical Propagation Delay; 35 ps Typical Rise and Fall Times; Differential CML Outputs, 400 mV peaktopeak, typical; Internal 50-ohm Input Termination Resistors; Random Clock Jitter < 0.8 ps RMS; 40C to +85C Ambient Operating Temperature

NB6LQ572MNG, Clock Generator CML, LVDS, LVPECL LVPECL 4-Input, 32-Pin QFN

QFN-32

NB7L585MNG, Clock Generator CML, LVDS, LVPECL LVPECL, 32-Pin QFN

ON SEMICONDUCTOR - NB7L86MMNG - LOGIC GATE, MULTI-FUNCTION, QFN-16

ON Semiconductor NB6N239SMNG, Clock Divider CML, HCSL, HSTL, LVDS, LVPECL LVDS 2-Input Differential 16-Pin QFN

Maximum Input Clock Frequency > 10 GHz, typical; 260 ps Typical Propagation Delay; 35 ps Typical Rise and Fall Times; Differential CML Outputs, 400 mV peaktopeak, typical; Internal 50-ohm Input Termination Resistors; Random Clock Jitter < 0.8 ps RMS; 40C to +85C Ambient Operating Temperature

Maximum Data Rate > 10Gbps; Maximum Clock Frequency > 7GHz; Random Clock Jitter < 0.5ps RMS; 30ps typical output rise & fall times; Differential CML Outputs; 2.5V or 3.3V Operating Voltage; Internal 50-ohm Input Termination; Industrial Temperature Range

NB7L585RMNG, Clock Generator CML, LVDS, LVPECL RSECL, 32-Pin QFN

NB7L14MNHTBG, Clock Generator LVPECL/CML/LVCMOS/LVTTL/LVDS LVPECL, 16-Pin QFN

Maximum Data Rate > 10Gbps; Maximum Clock Frequency > 7GHz; Random Clock Jitter < 0.5ps RMS; 30ps typical output rise & fall times; Differential CML Outputs; 2.5V or 3.3V Operating Voltage; Internal 50-ohm Input Termination; Industrial Temperature Range

Input Data Rate > 11 Gb/s Typical; Data Dependent Jitter < 15 ps; Maximum Input Clock Frequency > 8 GHz Typical; Random Clock Jitter < 0.8 ps RMS; Low Skew 1:2 LVPECL Outputs, < 10 ps max; 4:1 MultiLevel Mux Inputs, Accepts LVPECL, CML LVDS; 150 ps Typical Propagation Delay; Differential LVPECL Outputs, 750 mV Peak-to-Peak, Typical; Operating Range: VCC = 2.375 V to 3.6 V; Internal 50-ohm Input Termination Resistors; VREFAC Reference Output; 40C to +85C Ambient Operating Temperature

Input Data Rate > 12 Gb/s Typical; Data Dependent Jitter < 20 ps; Maximum Input Clock Frequency > 8 GHz Typical; Random Clock Jitter < 0.8 ps RMS; Low Skew 1:8 CML Outputs, < 25 ps max; Multi-Level Inputs, accepts LVPECL, CML, LVDS; Differential CML Outputs, 400 mV Peak-to-Peak, Typical; Operating Range: VCC = 2.375 V to 3.6 V, GND = 0 V; Internal Input Termination Resistors, 50-ohm; VREFAC Reference Output; -40C to +85C Ambient Operating TemperaturerPas

Maximum Input Clock Frequency > 2.0 GHz; Maximum Input Data Rate > 2.5 Gb/s; 1 ps Maximum RMS Clock Jitter; Typically 10 ps of Data Dependent Jitter; 380 ps Typical Propagation Delay; 120 ps Typical Rise and Fall Times; Pb-Free

Use the download button to access the NB6L611MNG schematic symbol, PCB footprint, and 3D model.

NB6LQ572MMNG, Clock Generator CML, LVDS, LVPECL CML 4-Input, 32-Pin QFN

ON Semiconductor NB7HQ14MMNHTBG Clock Generator 16-Pin QFN

Maximum Input Clock Frequency > 2.0 GHz; Maximum Input Data Rate > 2.5 Gb/s; 1 ps Maximum of RMS Clock Jitter; Typically 10 ps of Data Dependent Jitter; 380 ps Typical Propagation Delay; 120 ps Typical Rise and Fall Times; These devices are available in Pb-free package(s). Specifications herein

Linearity +/- 20ps Maximum ; Maximum Input Clock Frequency >1.5 GHz Typical; Programmable Range: 0 ns to 6 ns Dual Mode; Programmable Range: 0 ns to 11 ; 11 ps Delay Increments; INx/INxb Inputs Accept LVPECL, LVDS Levels; 3-Wire Serial Data Interface (SDI)

Input Clock Frequency > 2.0GHz; Input Data Rate > 2.5Gb/s; 1 ps Maximum RMS Clock Jitter; Typically 10 ps of Data Dependent Jitter; 380 ps Typical Propagation Delay; 120 ps Typical Rise and Fall Times; Single Power Supply Vcc=2.5V ± 5%; Pb-Free

Linearity +/- 20ps Maximum ; Maximum Input Clock Frequency >1.5 GHz Typical; Programmable Range: 0 ns to 6 ns Dual Mode; Programmable Range: 0 ns to 11 ns Entended Mode;; Delay Range: 3.2 ns to 9.0 ns Dual Mode; Delay Range: 6.2 ns to 17.8 ns Extended Mode; 11 ps Delay Increments; INx/INxb Inputs Accept LVPECL, LVDS Levels; 3-Wire Serial Data Interface (SDI)

Serial Load Capability; Flexible Input; Exceeds Bellcore and ITU Jitter Generation Specification; Performs Precision Clock Generation and Synthesis from a Single 27 MHz Crystal Reference; Output Enable; Fully Integrated Phase Lock Loop with Internal Loop Filter; PLL Lock Detect Output

QFN-16

Maximum Input Clock Frequency > 2.0 GHz; Maximum Input Data Rate > 2.5 Gb/s; Typically 1 ps of RMS Clock Jitter; Typically 10 ps of Data Dependent Jitter; 550 ps Typical Propagation Delay; 150 ps Typical Rise and Fall Times; Differential Open Collector CML Outputs

QFN-16

TSSOP-8

LEAD FREE, SOIC-8

NB6L11DG is a low-skew differential clock driver IC in the NECL 6L family by ON Semiconductor, operating in NECL mode with VEE from -2.375 V to -3.465 V and differential inputs. Key specs include 8-pin SOIC package, differential input conditioning, and sub-nanosecond output skew. Available from authorized distributors with worldwide shipping.

NB4N111KMNG, Clock Buffer CML, LVDS, LVMOS, LVPECL, LVTTL HCSL, LVDS, 1-Input, 32-Pin QFN

7 X 7 MM, LEAD FREE, PLASTIC, LQFP-32

ON Semiconductor NB4L339MNG, Clock Divider CML, LVDS, LVPECL LVPECL 2-Input Differential 32-Pin QFN

QFN-52

TSSOP-28

VDD core supply voltage can be set to 3.3 V, 2.5 V or 1.8 V; VDDO output supply voltage can be set to 3.3 V, 2.5 V, or 1.8 V, with the constraint that VDD >/= VDDO; 250 MHz Maximum Clock Frequency; Accepts LVCMOS, LVTTL Clock Inputs; 12 LVCMOS Clock Outputs; 150 ps Max. Skew Between Outputs; Temp. Range 40C to +85C; 32pin LQFP and QFN Packages; Synchronous Clock Enable