IDT
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The 7130 is a high-speed 1K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 7140 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535
The 7132 is a high-speed 2K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 7142 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535
The 74FCT3245 octal high-speed, low-power transceiver is ideal for asynchronous communication between two buses. The direction control pin (DIR) controls the direction of data flow. The output enable pin (OE) overrides the direction control and disables both ports. The 74FCT3245 has series current limiting resistors that offer low ground bounce, minimal undershoot, and controlled output fall times reducing the need for external series terminating resistors. The 74FCT3245 operates at -40C to +85C
The 74FCT3245 octal high-speed, low-power transceiver is ideal for asynchronous communication between two buses. The direction control pin (DIR) controls the direction of data flow. The output enable pin (OE) overrides the direction control and disables both ports. The 74FCT3245 has series current limiting resistors that offer low ground bounce, minimal undershoot, and controlled output fall times reducing the need for external series terminating resistors. The 74FCT3245 operates at -40C to +85C
The 74FCT3245 octal high-speed, low-power transceiver is ideal for asynchronous communication between two buses. The direction control pin (DIR) controls the direction of data flow. The output enable pin (OE) overrides the direction control and disables both ports. The 74FCT3245 has series current limiting resistors that offer low ground bounce, minimal undershoot, and controlled output fall times reducing the need for external series terminating resistors. The 74FCT3245 operates at -40C to +85C
The 74FCT3245 octal high-speed, low-power transceiver is ideal for asynchronous communication between two buses. The direction control pin (DIR) controls the direction of data flow. The output enable pin (OE) overrides the direction control and disables both ports. The 74FCT3245 has series current limiting resistors that offer low ground bounce, minimal undershoot, and controlled output fall times reducing the need for external series terminating resistors. The 74FCT3245 operates at -40C to +85C
The 74FCT3245 octal high-speed, low-power transceiver is ideal for asynchronous communication between two buses. The direction control pin (DIR) controls the direction of data flow. The output enable pin (OE) overrides the direction control and disables both ports. The 74FCT3245 has series current limiting resistors that offer low ground bounce, minimal undershoot, and controlled output fall times reducing the need for external series terminating resistors. The 74FCT3245 operates at -40C to +85C
The 74FCT3245 octal high-speed, low-power transceiver is ideal for asynchronous communication between two buses. The direction control pin (DIR) controls the direction of data flow. The output enable pin (OE) overrides the direction control and disables both ports. The 74FCT3245 has series current limiting resistors that offer low ground bounce, minimal undershoot, and controlled output fall times reducing the need for external series terminating resistors. The 74FCT3245 operates at -40C to +85C
The 74FCT3245 octal high-speed, low-power transceiver is ideal for asynchronous communication between two buses. The direction control pin (DIR) controls the direction of data flow. The output enable pin (OE) overrides the direction control and disables both ports. The 74FCT3245 has series current limiting resistors that offer low ground bounce, minimal undershoot, and controlled output fall times reducing the need for external series terminating resistors. The 74FCT3245 operates at -40C to +85C
The 74FCT3245 octal high-speed, low-power transceiver is ideal for asynchronous communication between two buses. The direction control pin (DIR) controls the direction of data flow. The output enable pin (OE) overrides the direction control and disables both ports. The 74FCT3245 has series current limiting resistors that offer low ground bounce, minimal undershoot, and controlled output fall times reducing the need for external series terminating resistors. The 74FCT3245 operates at -40C to +85C
IDT1338-31DCGI from IDT is a Integrated Circuit for industrial controls, embedded electronics, maintenance sourcing, and production assemblies. Key specifications include 8 pins, SOIC package/footprint, supporting reliable selection for OEM maintenance, prototyping, and production BOMs. The SOIC format supports standard assembly and sourcing workflows.
The 1339 serial real-time clock (RTC) is a low-power clock/date device with two programmable time-of-day alarms and a programmable square-wave output. Address and data are transferred serially through an I2C bus. The clock/date provides seconds, minutes, hours, day, date, month, and year information. The date at the end of the month is automatically adjusted for months with fewer than 31 days, including corrections for leap year. The clock operates in either the 24-hour or 12-hour format with AM/PM indicato
The 1339 serial real-time clock (RTC) is a low-power clock/date device with two programmable time-of-day alarms and a programmable square-wave output. Address and data are transferred serially through an I2C bus. The clock/date provides seconds, minutes, hours, day, date, month, and year information. The date at the end of the month is automatically adjusted for months with fewer than 31 days, including corrections for leap year. The clock operates in either the 24-hour or 12-hour format with AM/PM indicato
The 853S01I is a high performance 2:1 Differential-to-LVPECL Multiplexer. The 853S01I can also perform differential translation because the differential inputs accept LVPECL and LVDS levels. The 853S01I is packaged in a small 3mm x 3mm 16 VFQFN package, making it ideal for use on space constrained boards.
The 851S201I is a high performance 2:2 Differential-to-HCSL Multiplexer with a 2 output fanout buffer. The 851S201I operates up to 250MHz and accepts HCSL and other low level differential inputs levels. Input level detection circuitry is available to flag input levels that drops below a specified value and on the selected input. This signal is latched until the status is reset via the alarm reset input. The 851S201I is packaged in a small 3 x 3 mm 16 lead VFQFN package, making it ideal for use on space cons
The IDT 5P49V5901 is low-power programmable clock generator with best-in-class jitter performance and design flexibility with universal outputs capable of generating any output frequency. The 5P49V5901 is intended for high performance consumer, networking, industrial, computing, and data-communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I2C interface. This is IDTs fifth generation of programmable clock technology (VersaClock 5).The frequ
The 8V97051 is a high performance Wideband RF Synthesizer / PLL optimized for use as the local oscillator (LO) in Multi-Carrier, Multi-mode FDD & TDD Base Station radio card. It is offered in a compact 5x5, 32-VFQFN package.The 8V97051 Wideband RF Synthesizer / PLL offers a default Fractional Mode with the option to use it with an Integer mode. It requires an external loop filter.The 8V97051 with integrated Voltage Controlled Oscillator (VCO) supports output frequencies from 34.375MHz to 4400MHz and maint
Use the download button to access the 74FCT38072SCMGI schematic symbol, PCB footprint, and 3D model.
The 874001I-05 is a high performance Jitter Attenuator designed for use in PCI Express®™ systems. In some PCI Express® systems, such as those found in desktop PCs, the PCI Express® clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems, a jitter attenuator may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The 874001I-05 has a bandwidth of 6MHz with <1dB peaking, easily me
The 7130 is a high-speed 1K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 7140 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535
IDT IDT72V2113L10PFI, FIFO Memory, Dual, 256K x 18 bit, 512K x 9 bit, Uni-Directional 6.5ns 100MHz, 3.15 → 3.45 V
The 5P49V5933 is a programmable clock generator intended for high performance consumer, networking, industrial, computing, and data communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using an I2C interface. This is IDT's fifth generation of programmable clock technology (VersaClock® 5). The 5P49V5933, by default, uses an integrated 25 MHz crystal as an input reference. It also has a redundant external clock input. A glitchless manual switchover
IDT IDT7132LA55PDGI is an integrated circuit for electronic assemblies. It is specified around 48 pins for matching footprints and electrical requirements. From inquiry pricing with worldwide shipping support.
The 5V41067A is a 2:4 differential clock mux for PCI Express applications. It has very low additive jitter making it suitable for use in PCIe Gen2 and Gen3 systems. The 5V41067A selects between 1 of 2 differential HCSL inputs to fanout to 4 differential HCSL output pairs. The outputs can also be terminated to LVDS.
The F2255 is a low insertion loss Voltage Variable RF Attenuator (VVA) covers a broad frequency range from 1 MHz to 3000 MHz. In addition to providing low insertion loss, the F2255 provides high linearity and low return loss performance over entire frequency, voltage control and attenuation ranges. The device uses a single positive supply voltage of 3.15 V to 5.25 V. Other features include the VMODE pin allowing either positive or negative voltage control slope vs attenuation and multi-directional operati
Use the download button to access the 551SCMGI schematic symbol, PCB footprint, and 3D model.
IDT ICS874003AG-02LF is a PLL frequency synthesizer IC supporting 98 to 320 MHz output range in a 20-pin TSSOP package. Features low jitter clock synthesis with wide frequency tuning. Available from authorized distributors worldwide with competitive pricing.
The 5P49V5907 is a programmable clock generator intended for high performance consumer, networking, industrial, computing, and data communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I2C interface. This is Renesas' fifth generation of programmable clock technology (VersaClock® 5). The frequencies are generated from a single reference clock or crystal.Two select pins allow up to 4 different configurations to be programmed and accessible u
The 8S89832I is a high speed 1-to-4 Differential-to-LVDS Fanout Buffer. The 8S89832I is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_AC pin allow other differential signal families such as LVPECL, LVDS, and SSTL to be easily interfaced to the input with minimal use of external components. The device also has an output enable pin
The 8S89833I is a high speed 1-to-4 Differential-to-LVDS Fanout Buffer with Internal Termination. The 8S89833I is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_AC pin allow other differential signal families such as LVPECL, LVDS, and CML to be easily interfaced to the input with minimal use of external components. The device also
The 854S054I is a 4:1 Differential-to-LVDS Clock Multiplexer which can operate up to 2.5GHz. The 854S054I has 4 selectable differential clock inputs. The PCLK, nPCLK input pairs can accept LVPECL, LVDS or CML levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors. The SEL1 pin is the most significant bit and the binary number applied to the select pins will select the same numbered data inp
The 859S0412I is a 4:2 Differential-to-LVPECL/ LVDS Clock Multiplexer which can operate up to 3GHz. The 859S0412I has 4 selectable differential PCLKx/nPCLKx clock inputs. The PCLKx, nPCLKx input pairs can accept LVPECL, LVDS, CML or SSTL levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The clock select pins have internal pulldown resistors. The CLK_SEL1 pin is the most significant bit and the binary number applied to the select pins
The 5P1105 is a programmable fanout buffer intended for high performance consumer, networking, industrial, computing, and data-communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I²C interface.The outputs are generated from a single reference clock. The reference clock can come from one of the two redundant clock inputs. A glitchless manual switchover function allows one of the redundant clocks to be selected during normal operation. Two
The 5P49V5908 is a programmable clock generator intended for high performance consumer, networking, industrial, computing, and data communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I2C interface. This is Renesas' fifth generation of programmable clock technology (VersaClock® 5). The frequencies are generated from a single reference clock or crystal.Two select pins allow up to 4 different configurations to be programmed and accessible u
The 5P1103 is a programmable fanout buffer intended for high performance consumer, networking, industrial, computing, and data-communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I²C interface.The outputs are generated from a single reference clock. The input reference can be crystal, external single-ended or differential clock. The reference clock can come from one of the two redundant clock inputs and is selected by CLKSEL pin. A glitch
The IDT 5P49V5914 is low-power programmable clock generator with best-in-class jitter performance and design flexibility with universal outputs capable of generating any output frequency. The 5P49V5914 is intended for high performance consumer, networking, industrial, computing, and data-communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I2C interface. This is IDT’s fifth generation of programmable clock technology (VersaClock 5). The fre
The IDT 5P49V5913 is low-power programmable clock generator with best-in-class jitter performance and design flexibility with universal outputs capable of generating any output frequency. The 5P49V5913 is intended for high performance consumer, networking, industrial, computing, and data-communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I2C interface. This is IDT’s fifth generation of programmable clock technology (VersaClock 5). The fre
Use the download button to access the 551SDCGI8 schematic symbol, PCB footprint, and 3D model.
Use the download button to access the 551SDCGI schematic symbol, PCB footprint, and 3D model.
The 5P49V5935 is a programmable clock generator intended for high performance consumer, networking, industrial, computing, and data communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using an I2C interface. This is IDT's fifth generation of programmable clock technology (VersaClock® 5). The 5P49V5935, by default, uses an integrated 25 MHz crystal as an input reference. It also has a redundant external clock input. A glitchless manual switchover
The F1956 is part of a family of Glitch-Free™ DSAs which offers very high reliability due to its monolithic silicon die construction in a compact 5 x 5 mm 32-pin TQFN package. It has very low insertion loss is with minimal distortion and is designed with a 50Ω input and output impedance. Additionally, the device is designed to have high accurate which improves SNR and/or ACLR by ensuring the system gain is achieved as close to targeted as possible.
The 308 is a versatile serially programmable, quad PLL clock source. The 308 can generate any frequency from 250 kHz to 200 MHz, and up to 6 different output frequencies simultaneously. The outputs can be reprogrammed on the fly, and will lock to a new frequency in 10 ms or less. Smooth transitions (in which the clock duty cycle remains roughly 50%) are guaranteed if the output divider is not changed. The device includes a PDTS pin which tri-states the output clocks and powers down the entire chip. The 308
The P9025AC is an integrated single-chip, WPC-1.1.2 compliant wireless power receiver with an advanced Foreign Object Detection (FOD) feature. This device operates with an AC power signal from a resonant tank and converts it into a regulated 5.3V output voltage. The receiver includes a high efficiency Synchronous Full Bridge Rectifier and 5.3V tracking LDO output stage. The P9025AC operation automatically detects the transmitter type and initiates WPC AC modulation communication protocols with optimal effic
8T49N287-998NLGI from IDT is a crystal or oscillator for clock generation, timing references, communications, and microcontroller support. Key specifications include 38.88MHz, 11.5Hz, 1Byte, 2.5V, Quad Flat No-Lead package/footprint, supporting reliable selection for OEM maintenance, prototyping, and production BOMs. The Quad Flat No-Lead format supports standard assembly and sourcing workflows.
8T49N286-999NLGI from IDT is a integrated Circuit. Key specs include 73 pins. From inquiry pricing, buyers can request stock with worldwide shipping. Suitable for production sourcing and approved vendor list reviews.
The 8442 is a general purpose, dual output Crystal-to-Differential LVDS High Frequency Synthesizer. The 8442 has a selectable TEST_CLK or crystal input. The TEST_CLK input accepts LVCMOS or LVTTL input levels and translates them to LVDS levels. The VCO operates at a frequency range of 250MHz to 700MHz. The VCO frequency is programmed in steps equal to the value of the input reference or crystal frequency. The VCO and output frequency can be programmed using the serial or parallel interface to the configurat
The 841N254I is a 4-output clock synthesizer designed for S-RIO 1.3 and 2.0 reference clock applications. The device generates four copies of a selectable 250MHz, 156.25MHz, 125MHz or 100MHz clock signal with excellent phase jitter performance. The four outputs are organized in two banks of two LVDS and two HCSL outputs. The device uses Renesas' fourth generation FemtoClock™ NG technology for an optimum of high clock frequency and low phase noise performance, combined with a low power consumption and high p
The 74LVC16244A 16-bit buffer/driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters and can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. All pins of the 74LVC16244A can be driven from either 3.3V or 5V devices which allows the use of the device as a translator in a mixed 3.3V/5V supply system. The 74LVC16244A operates at -40C to +85C
The 74LVC16244A 16-bit buffer/driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters and can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. All pins of the 74LVC16244A can be driven from either 3.3V or 5V devices which allows the use of the device as a translator in a mixed 3.3V/5V supply system. The 74LVC16244A operates at -40C to +85C
The 74FCT164245T 16-bit high-speed, low-power 3.3V-to-5V translator is designed to interface between a 3.3V bus and a 5V bus in a mixed 3.3V/ 5V supply environment. This enables system designers to interface TTL compatible 3.3V components with 5V components. The direction and output enable controls operate these devices as either two independent 8-bit transceivers or one 16-bit transceiver. The 74FCT164245T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The 74FCT164245T