SN74LS147DR Texas Instruments Integrated Circuit (Small Outline Packages) In Stock
SN74LS147DR is a 10-line to 4-line BCD priority encoder from Texas Instruments' 74LS logic family, encoding nine active-low inputs into a 4-bit BCD code with inverted outputs. It handles priority resolution in hardware so the highest-order active input determines the encoded output without software intervention. Packaged in a 16-pin SOIC, it suits keypad encoding, interrupt prioritization, and numeric input interfaces in 5 V TTL systems.
- Manufacturer
- Texas Instruments
- Package
- Small Outline Packages
- Pin Count
- 16
- Lifecycle
- OBSOLETE
- Datasheet
- SN74LS147DR Datasheet PDF
- Category
- Integrated Circuit
- Temp Range
- ?°C to 70.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- 10-line to 4-line BCD priority encoder in 74LS family
- 9 active-low data inputs with hardware priority resolution
- Inverted (active-low) 4-bit BCD output for direct TTL bus connection
- 16-pin SOIC package (JEDEC R-PDSO-G16)
- 15 pF load capacitance for standard TTL fan-out
- Single-function device for straightforward encoder integration
- Compatible with 5 V TTL logic levels and standard LS-family drive strength
Applications
The SN74LS147DR is used in 5 V TTL digital systems that need to convert one-of-ten input assertions into a 4-bit BCD code, such as numeric keypad interfaces, rotary switch encoders, and hardware interrupt priority arbiters. Its hardware priority logic selects the highest-order active input automatically, eliminating the need for a microcontroller polling loop. Legacy industrial terminals, test instrument front panels, and retrofit encoder replacement circuits also rely on this device for reliable, glitch-free key-press to BCD conversion.
Specifications
| Pbfree Code | No |
| YTEOL | 0 |
| Additional Feature | 10 TO 4 LINE PRIORITY ENCODER |
| Family | LS |
| JESD-30 Code | R-PDSO-G16 |
| Load Capacitance (CL) | 15pF |
| Logic IC Type | ENCODER |
| Number of Bits | 9 |
| Number of Functions | 1 |
| Output Polarity | INVERTED |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | SOP16,.25 |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE |
| Packing Method | TR |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Power Supply Current-Max (ICC) | 20mA |
| Propagation Delay (tpd) | 33ns |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 5.25V |
| Supply Voltage-Min (Vsup) | 4.75V |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | YES |
| Technology | TTL |
| Temperature Grade | COMMERCIAL |
| Terminal Form | GULL WING |
| Terminal Pitch | 1.27mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| HTS Code | 8542.39.00.60 |
Alternate & Equivalent Parts
Compatible alternatives and drop-in replacements for SN74LS147DR:
Frequently Asked Questions
How many inputs does the SN74LS147DR accept, and how does it resolve priority between simultaneous active inputs?
The SN74LS147DR accepts 9 active-low data inputs plus an implicit zero input, totaling a 10-line encoding range that produces a 4-bit BCD output from 0 through 9. When multiple inputs are asserted simultaneously, the device's internal priority logic automatically selects the highest-numbered active input and outputs its corresponding BCD code. This hardware-resolved priority eliminates encoding ambiguity without requiring any software arbitration routine.
Why are the outputs of the SN74LS147DR inverted, and how should they be used in a 5 V TTL design?
The 4-bit BCD outputs are active-low, meaning a logic zero represents an asserted bit. To obtain non-inverted BCD for direct connection to a microcontroller or BCD display decoder, each output should pass through a 74LS04 or 74LS14 inverter gate. Alternatively, a downstream decoder such as the 74LS47 that also accepts active-low BCD inputs can be connected directly, consuming no additional inverters and saving board space and gate delays in a 5 V TTL stack.
What supply voltage and logic family does the SN74LS147DR require?
The SN74LS147DR operates from a 4.75 V to 5.25 V supply, conforming to the standard 74LS TTL specification. Input thresholds follow the TTL standard of 0.8 V maximum for logic low and 2.0 V minimum for logic high. The device's 15 pF load capacitance per output allows driving standard LS-family inputs with a fan-out of at least 10, consistent with other 74LS logic devices operating on the same regulated 5 V rail.
For a compact PCB layout, how does the 16-pin SOIC package of the SN74LS147DR compare to a DIP-16 version?
The 16-pin SOIC (R-PDSO-G16) measures approximately 9.9 mm × 3.9 mm with a 1.27 mm lead pitch, compared to the DIP-16's roughly 20 mm × 6.35 mm body with 2.54 mm pitch. The SOIC version occupies about 70% less PCB area, reducing board space in SMT assemblies. All 9 priority encoder inputs, 4 BCD outputs, and power pins are retained in the smaller footprint, making the SOIC variant preferred for modern compact designs.
Can the SN74LS147DR encode inputs from a mechanical 10-position keypad directly?
Yes. Each of the 9 active-low data inputs can be connected to a keypad switch that pulls the pin from the logic-high idle state to ground when pressed. A pull-up resistor of 1 kΩ to 10 kΩ on each input ensures valid logic-high levels of at least 2 V when the switch is open. The SN74LS147DR then outputs the 4-bit BCD code for keys 1 through 9, with all inputs de-asserted representing the digit 0 at the output.
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About Texas Instruments
Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
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