MCP655-E/UN Microchip Integrated Circuit (Small Outline Packages) In Stock
The MCP655-E/UN is a dual-channel, 50 MHz CMOS operational amplifier from Microchip Technology with dual auto-zero calibration, 84 dB typical CMRR, and 5 nA maximum bias current in a compact Pb-free MSOP-10 package. It covers the extended industrial temperature range for precision wideband signal conditioning in space-constrained designs.
- Manufacturer
- Microchip
- Package
- Small Outline Packages
- Pin Count
- 10
- Lifecycle
- ACTIVE
- Datasheet
- MCP655-E/UN Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $1.9800(MOQ 1)
- Temp Range
- -40.0°C to 125.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- Dual auto-zero calibration continuously corrects input offset voltage drift, maintaining sub-µV offset accuracy across the full -40°C to 125°C extended temperature range
- 50 MHz gain-bandwidth product enables wideband active filter, line driver, and ADC input buffer designs operating at signal frequencies up to 10 MHz
- 5 nA maximum input bias current and 84 dB typical CMRR in MSOP-10 package support precise differential signal conditioning in compact industrial PCB layouts
Applications
The MCP655-E/UN is suited for precision wideband instrumentation amplifiers, active anti-aliasing filters ahead of 16-bit ADCs, and high-speed sensor interface circuits requiring 50 MHz bandwidth with auto-zeroed offset stability across -40°C to 125°C. Industrial process control transmitters and data acquisition front-ends benefit from its dual auto-calibration, which eliminates offset drift errors that accumulate in long-running thermocouple or strain gauge measurements. Communications equipment and test instrumentation use its 50 MHz GBW for high-fidelity signal amplification in frequency ranges from audio through intermediate frequencies without external trimming.
Specifications
| Pbfree Code | Yes |
| Manufacturer Package Code | MSOP-10 |
| Factory Lead Time | 7Weeks |
| YTEOL | 7 |
| Amplifier Type | OPERATIONAL AMPLIFIER |
| Architecture | VOLTAGE-FEEDBACK |
| Average Bias Current-Max (IIB) | 0.005 µA |
| Common-mode Reject Ratio-Min | 68dB |
| Common-mode Reject Ratio-Nom | 84dB |
| Frequency Compensation | YES |
| Input Offset Voltage-Max | 200 µV |
| JESD-30 Code | S-PDSO-G10 |
| JESD-609 Code | e3 |
| Low-Bias | YES |
| Low-Offset | YES |
| Micropower | NO |
| Number of Functions | 2 |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | TSSOP10,.19,20 |
| Package Shape | SQUARE |
| Package Style | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH |
| Packing Method | TUBE |
| Peak Reflow Temperature (Cel) | 260 |
| Power | NO |
| Programmable Power | NO |
| Qualification Status | Not Qualified |
| Screening Level | TS 16949 |
| Slew Rate-Nom | 30V/us |
| Supply Current-Max | 18mA |
| Supply Voltage Limit-Max | 6.5V |
| Supply Voltage-Nom (Vsup) | 2.5V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | AUTOMOTIVE |
| Terminal Finish | Matte Tin (Sn) |
| Terminal Form | GULL WING |
| Terminal Pitch | 0.5mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Unity Gain BW-Nom | 50000 |
| Voltage Gain-Min | 25118 |
| Wideband | NO |
| ## MCP655-E/UN Alternates Showing results | Image |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| ECCN | EAR99 |
| HTS Code | 8542.33.00.01 |
| Country of Origin | Thailand |
Alternate & Equivalent Parts
Compatible alternatives and drop-in replacements for MCP655-E/UN:
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Frequently Asked Questions
What gain-bandwidth product does the MCP655-E/UN provide, and at what closed-loop gain is it useful for ADC input buffering?
The MCP655-E/UN provides a 50 MHz gain-bandwidth product, giving a -3 dB bandwidth of 5 MHz at a closed-loop gain of 10 V/V and 1 MHz at a gain of 50 V/V. For 16-bit SAR ADC input buffering at 1 MSPS with a 500 kHz signal bandwidth, a closed-loop gain of 10 leaves a comfortable 10x bandwidth margin to settle the output within 1 LSB of the final value.
How does the dual auto-zero calibration in the MCP655-E/UN benefit a thermocouple measurement system over the full industrial temperature range?
The MCP655-E/UN's dual auto-zero architecture continuously measures and corrects its own input offset, maintaining sub-10 µV effective offset across the -40°C to 125°C extended temperature range. Without auto-zero correction, a standard CMOS op-amp with 5 µV/°C offset drift accumulates over 800 µV of drift across the full 165°C range, which equals 20°C of thermocouple measurement error in a type-K junction, making auto-zero essential for industrial temperature logging accuracy.
What is the maximum input bias current of the MCP655-E/UN, and how does it affect a high-impedance piezoelectric sensor interface?
The MCP655-E/UN's maximum input bias current of 5 nA (0.005 µA) creates only 5 µV of offset error across a 1 MΩ source impedance, which is acceptable for piezoelectric accelerometer buffering where source impedances range from 100 kΩ to 10 MΩ. This is over 100x lower than standard bipolar op-amps at 500 nA, allowing direct piezoelectric signal amplification without a dedicated JFET-input buffer stage.
What package does the MCP655-E/UN use, and how does it compare to a standard SOIC-8 in terms of PCB board area?
The MCP655-E/UN uses an MSOP-10 package measuring approximately 3 mm x 3 mm with 0.5 mm lead pitch, occupying roughly 9 mm² of PCB area versus 29 mm² for a standard SOIC-8 package. This 3x reduction in footprint makes the MCP655-E/UN the preferred dual op-amp choice in high-density 4-layer industrial PCBs where the dual 50 MHz channels in MSOP-10 replace two separate single-channel op-amp packages.
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| Qty. | Unit Price | Ext. Price |
|---|---|---|
| 1+ | $2.7700 | $2.77 |
| 100+ | $2.2700 | $227.00 |
| 200+ | $2.2200 | $444.00 |
| 1000+ | $2.1900 | $2190.00 |
| 5000+ | $2.0000 | $10000.00 |
| 7500+ | $1.9800 | $14850.00 |
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