CD74ACT280MG4 Texas Instruments Integrated Circuit (Small Outline Packages) In Stock
CD74ACT280MG4 is a 9-bit parity generator and checker IC by Texas Instruments in 14-pin SOIC. Key specs: 4.5 V to 5.5 V supply, odd/even parity output, ACT-family TTL inputs. From $0.60 in stock with worldwide shipping.
- Manufacturer
- Texas Instruments
- Package
- Small Outline Packages
- Pin Count
- 14
- Lifecycle
- OBSOLETE
- Datasheet
- CD74ACT280MG4 Datasheet PDF
- Category
- Integrated Circuit
- Temp Range
- -55.0°C to 125.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- 9-bit parity generator and checker with simultaneous odd and even parity outputs for flexible error detection
- ACT-family TTL-compatible inputs operating from 4.5 V to 5.5 V for direct 5 V bus interfacing
- 14-pin SOIC surface-mount package with single-function parity logic simplifying 8-bit data integrity circuits
Applications
CD74ACT280MG4 is used in memory subsystems and parallel data buses to generate and verify parity bits for single-bit error detection in 8-bit or 9-bit wide data paths. It supports both odd and even parity schemes from a single device, making it applicable to DRAM parity checking, EPROM data verification, and serial communication data integrity circuits. The ACT-family's TTL-compatible inputs ensure reliable operation when interfacing with 5 V TTL bus drivers common in legacy industrial control systems.
Specifications
| Pbfree Code | Yes |
| YTEOL | 0 |
| Additional Feature | ODD/EVEN PARITY GENERATOR |
| Family | ACT |
| JESD-30 Code | R-PDSO-G14 |
| JESD-609 Code | e4 |
| Load Capacitance (CL) | 50pF |
| Logic IC Type | PARITY GENERATOR/CHECKER |
| Number of Bits | 9 |
| Number of Functions | 1 |
| Output Polarity | COMPLEMENTARY |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | SOP14,.25 |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE |
| Peak Reflow Temperature (Cel) | 260 |
| Power Supply Current-Max (ICC) | 50mA |
| Propagation Delay (tpd) | 21.6ns |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | MILITARY |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Terminal Form | GULL WING |
| Terminal Pitch | 1.27mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| HTS Code | 8542.39.00.60 |
Alternate & Equivalent Parts
No known alternates. Submit an RFQ and our team can suggest alternatives.
Frequently Asked Questions
How many data bits does CD74ACT280MG4 process, and does it support both odd and even parity?
CD74ACT280MG4 accepts 9 data input bits and simultaneously provides two complementary outputs: one for even parity and one for odd parity. This dual-output design allows the same IC to serve either parity convention without external inversion, covering 8-bit data plus 1 parity bit word formats used in DRAM and parallel communication buses.
What supply voltage range does CD74ACT280MG4 require, and how does it differ from HC-family parity ICs?
CD74ACT280MG4 requires a 4.5 V to 5.5 V supply, narrower than the HC family's 2 V to 6 V range. The ACT family's TTL-compatible input thresholds (VIH = 2 V, VIL = 0.8 V) accept signals from TTL-output logic without level shifting, whereas HC-family inputs require CMOS swing levels near VCC and may misread TTL HIGH levels at 5 V supply.
In which memory or communication system error-detection designs is CD74ACT280MG4 used?
CD74ACT280MG4 is commonly specified in DRAM parity systems where a 9th parity bit is stored alongside 8 data bits to detect single-bit soft errors. It also appears in ISA-bus and EISA-bus parity circuits in embedded industrial computers, where the 9-bit input width exactly matches the 8 data bits plus 1 parity bit standard of those parallel memory buses.
How does CD74ACT280MG4 simplify parity checking compared to using discrete XOR gate chains?
CD74ACT280MG4 integrates the complete 9-input XOR tree in a single 14-pin SOIC device, replacing 8 discrete 2-input XOR gates and their wiring. The integrated approach reduces propagation delay to approximately 10 ns at 5 V versus 35 ns to 50 ns for a 3-stage XOR chain, and cuts component count from 8 ICs to 1, saving significant board area and assembly cost.
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About Texas Instruments
Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
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