TC7WZ126FK Toshiba Integrated Circuit (Small Outline Packages) In Stock
Toshiba TC7WZ126FK is a dual unidirectional bus buffer in the LVC/LCX/Z logic family, housed in an 8-pin SOT-765 package. Offers 13 ns propagation delay at 15 pF load with 32 mA output drive capability and enable-high control for 3-state bus sharing. Competitively priced and available from global distributors with reliable worldwide shipping.
- Manufacturer
- Toshiba
- Package
- Small Outline Packages
- Pin Count
- 8
- Lifecycle
- ACTIVE
- Datasheet
- TC7WZ126FK Datasheet PDF
- Category
- Integrated Circuit
- Temp Range
- -40.0°C to 85.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- Dual independent bus buffers with active-high enable control support flexible 3-state bus sharing in multi-master designs
- Fast 13 ns propagation delay at 15 pF load with 32 mA output drive suits high-speed logic level translation and bus buffering
- Ultra-compact 8-pin SOT-765 package occupies minimal PCB area for space-constrained mobile and wearable electronics
Applications
The TC7WZ126FK is used for bus isolation and signal buffering in microcontroller I/O expansion circuits, UART level translation, and SPI bus fan-out applications operating from 1.65 V to 5.5 V supplies. Its dual-channel 3-state architecture allows two independent bus segments to share a common data line with enable-high control, preventing bus contention in multi-device systems. The tiny SOT-765 package makes it ideal for handheld devices, IoT sensor nodes, and compact embedded modules where board space is limited.
Specifications
| YTEOL | 6 |
| Control Type | ENABLE HIGH |
| Count Direction | UNIDIRECTIONAL |
| Family | LVC/LCX/Z |
| JESD-30 Code | R-PDSO-G8 |
| Load Capacitance (CL) | 50pF |
| Logic IC Type | BUS DRIVER |
| Max I(ol) | 0.024A |
| Number of Bits | 1 |
| Number of Functions | 2 |
| Number of Ports | 2 |
| Output Characteristics | 3-STATE |
| Output Polarity | TRUE |
| Package Body Material | PLASTIC/EPOXY |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Power Supply Current-Max (ICC) | 50mA |
| Prop. Delay@Nom-Sup | 6ns |
| Propagation Delay (tpd) | 11.5ns |
| Qualification Status | Not Qualified |
| Screening Level | AEC-Q100 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 1.65V |
| Supply Voltage-Nom (Vsup) | 1.8V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Form | GULL WING |
| Terminal Pitch | 0.5mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| HTS Code | 8542.39.00.60 |
Alternate & Equivalent Parts
No known alternates. Submit an RFQ and our team can suggest alternatives.
Frequently Asked Questions
What is the propagation delay and output drive current of the TC7WZ126FK at a typical capacitive load?
The TC7WZ126FK achieves a propagation delay of 13 ns at a 15 pF load with an output drive capability of 32 mA. At the higher specified load of 50 pF, the propagation delay increases slightly, which is important to account for when timing budgets are tight in multi-drop bus designs operating above 50 MHz.
How does the TC7WZ126FK's 3-state enable control prevent bus contention in multi-master SPI or I2C designs?
Each of the 2 buffer channels in the TC7WZ126FK has an independent active-high output enable (OE) pin that places the output in a high-impedance state when deasserted. This 3-state control allows system firmware or logic to selectively disconnect one or both buffers from a shared 1.8 V to 3.3 V bus, preventing data collisions between multiple masters on the same signal line.
What space advantage does the TC7WZ126FK's SOT-765 package provide compared to SC-70 or SOT-23 alternatives for dual-buffer functions?
The 8-pin SOT-765 package measures approximately 2.0 mm x 2.1 mm, integrating 2 independent bus buffer channels in a footprint smaller than many single-channel SC-70 or SOT-23-5 devices. Choosing TC7WZ126FK over two discrete single-buffer ICs saves roughly 30-50% PCB area and reduces BOM count by 1 component in mobile, wearable, and IoT designs where every square millimeter matters.
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