SST26VF040AT-104I/MF Microchip Integrated Circuit (Small Outline No-lead) In Stock
Microchip SST26VF040AT-104I/MF is a 4 Mbit SPI and Quad I/O NOR flash memory rated at 104 MHz clock frequency with 100,000 write/erase cycle endurance and 100-year data retention. Housed in a compact 8-pad WSON (WDFN) package, it suits code storage and XIP execution in low-power embedded systems.
- Manufacturer
- Microchip
- Package
- Small Outline No-lead
- Pin Count
- 8
- Lifecycle
- ACTIVE
- Datasheet
- SST26VF040AT-104I/MF Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $1.1700(MOQ 100)
- Temp Range
- -40.0°C to 85.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
What are the key features of SST26VF040AT-104I/MF?
- 4 Mbit (512 KB) NOR flash with Quad I/O SPI interface operating at up to 104 MHz for fast code-shadow and XIP execution
- 100,000 write/erase cycle endurance and 100-year data retention ensuring long service life in embedded firmware storage
- Individual block protection registers enable fine-grained sector locking without a full-chip erase cycle
- 2.7V to 3.6V supply voltage range compatible with standard 3.3V microcontroller and FPGA I/O banks
- Compact 8-pad WSON (WDFN) SMD package minimizing board area for space-critical IoT and wearable designs
What is SST26VF040AT-104I/MF used for?
The SST26VF040AT-104I/MF is used as firmware and boot code storage in microcontroller-based IoT nodes, wireless sensor modules, and industrial embedded boards that require fast SPI or Quad I/O flash at 104 MHz. Its 4 Mbit density is ideal for storing RTOS images, configuration data, and over-the-air firmware update buffers in systems using Cortex-M0+ or RISC-V MCUs with limited internal flash. The individual block protection feature also suits secure element companion designs where different firmware partitions must be independently write-locked.
What are the specifications of SST26VF040AT-104I/MF?
| Manufacturer Package Code | WSON-8 |
| Factory Lead Time | 7Weeks |
| YTEOL | 18 |
| Clock Frequency-Max (fCLK) | 104MHz |
| Data Retention Time-Min | 100 |
| Endurance | 100000 Write/Erase Cycles |
| JESD-30 Code | R-PDSO-N8 |
| JESD-609 Code | e3 |
| Memory Density | 4194304bit |
| Memory IC Type | FLASH |
| Memory Width | 1 |
| Number of Functions | 1 |
| Number of Ports | 1 |
| Number of Words | 4194304words |
| Number of Words Code | 4000000 |
| Operating Mode | SYNCHRONOUS |
| Organization | 4MX1 |
| Output Characteristics | 3-STATE |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | SOLCC8,.25 |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE |
| Parallel/Serial | SERIAL |
| Peak Reflow Temperature (Cel) | 260 |
| Programming Voltage | 3V |
| Serial Bus Type | SPI |
| Standby Current-Max | 0.00002A |
| Supply Current-Max | 0.025mA |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 2.7V |
| Supply Voltage-Nom (Vsup) | 3V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | Matte Tin (Sn) |
| Terminal Form | NO LEAD |
| Terminal Pitch | 1.27mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Type | NOR TYPE |
| Write Protection | HARDWARE/SOFTWARE |
| ## SST26VF040AT-104I/MF Alternates Showing results | Image |
| Package | Small Outline No-lead |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| ECCN | 3A991.B.1.A |
| HTS Code | 8542.32.00.51 |
| Country of Origin | Taiwan, Thailand |
Where can I find the SST26VF040AT-104I/MF datasheet?
SST26VF040AT-104I/MF Datasheet DownloadOfficial datasheet from Microchip
What are equivalent replacements for SST26VF040AT-104I/MF?
Compatible alternatives and drop-in replacements for SST26VF040AT-104I/MF:
suggested
suggested
Frequently Asked Questions
How does the Quad I/O mode of the SST26VF040AT-104I/MF accelerate code read performance compared to standard SPI mode?
In standard SPI mode with a single data line the SST26VF040AT-104I/MF transfers 1 bit per clock cycle, giving 104 Mbit/s peak bandwidth at 104 MHz. In Quad I/O mode all 4 data lines are used simultaneously, quadrupling effective throughput to approximately 416 Mbit/s — equivalent to 52 MB/s — which allows a host MCU to execute code directly from flash (XIP) at speeds that would be impractical over standard single-bit SPI on a 4 Mbit memory.
For an IoT firmware update application that rewrites flash monthly, how long will the SST26VF040AT-104I/MF endure before reaching its wear limit?
The SST26VF040AT-104I/MF is rated for 100,000 write/erase cycles per block. At one full-chip erase-and-reprogram per month the device would reach its endurance limit after approximately 8,333 months — over 694 years — making cycle wear completely negligible for OTA firmware update applications. Even at one update per day, it would exceed 273 years of service, far beyond any expected product lifetime.
What supply voltage range does the SST26VF040AT-104I/MF require and is it compatible with 3.3V MCU SPI buses?
The SST26VF040AT-104I/MF operates from a 2.7V to 3.6V VDD supply, which is directly compatible with standard 3.3V MCU I/O and power rails without level-shifting. The 104 MHz SPI clock is also within the range of common 3.3V SPI interfaces on Cortex-M, PIC32, and RISC-V MCUs, making the device a drop-in NOR flash solution for 4 Mbit code-storage needs in 3.3V embedded systems.
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More from Microchip
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| 100+ | $1.3100 | $131.00 |
| 1000+ | $1.2500 | $1250.00 |
| 5000+ | $1.1700 | $5850.00 |
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