SN74LVC373ADBRG4 Texas Instruments Integrated Circuit (Small Outline Packages) In Stock
The SN74LVC373ADBRG4 is an 8-bit transparent D-type latch with 3-state outputs from the LVC logic family, housed in a 20-pin SSOP package. It supports a 1.65 V to 5.5 V wide supply range, 24 mA output drive, and a 50 pF rated load capacitance for robust bus driving. Designed for low-voltage data bus latching, address demultiplexing, and output port expansion in mixed-voltage embedded systems.
- Manufacturer
- Texas Instruments
- Package
- Small Outline Packages
- Pin Count
- 20
- Lifecycle
- ACTIVE
- Datasheet
- SN74LVC373ADBRG4 Datasheet PDF
- Category
- Integrated Circuit
- Temp Range
- -40.0°C to 85.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
What are the key features of SN74LVC373ADBRG4?
- 8-bit transparent D-type latch with 3-state output control
- 1.65 V to 5.5 V wide supply range for mixed-voltage systems
- 24 mA output sink current for driving 50 pF bus loads
- LVC family with 5 V tolerant inputs for level-shifting applications
- Active-high latch enable and active-low output enable control
- 20-pin SSOP package for compact SMT board designs
What is SN74LVC373ADBRG4 used for?
The SN74LVC373ADBRG4 is used for address bus demultiplexing in microcontroller systems where an 8-bit address must be latched from a multiplexed address/data bus, such as in 8051-family processor interfacing. Its 3-state outputs and 1.65 V to 5.5 V supply range make it well suited for output port expansion and bus isolation in 3.3 V or 2.5 V embedded systems communicating with 5 V peripherals. Data acquisition systems, industrial PLCs, and FPGA I/O expansion boards also rely on its transparent latch architecture for reliable 8-bit parallel data capture and buffering.
What are the specifications of SN74LVC373ADBRG4?
| Pbfree Code | Yes |
| YTEOL | 15 |
| Family | LVC/LCX/Z |
| JESD-30 Code | R-PDSO-G20 |
| JESD-609 Code | e4 |
| Load Capacitance (CL) | 50pF |
| Logic IC Type | BUS DRIVER |
| Max I(ol) | 0.024A |
| Number of Bits | 8 |
| Number of Functions | 8 |
| Number of Ports | 2 |
| Output Characteristics | 3-STATE |
| Output Polarity | TRUE |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | SSOP20,.3 |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE, SHRINK PITCH |
| Packing Method | TR |
| Peak Reflow Temperature (Cel) | 260 |
| Power Supply Current-Max (ICC) | 0.01mA |
| Prop. Delay@Nom-Sup | 6.8ns |
| Propagation Delay (tpd) | 8.2ns |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 2V |
| Supply Voltage-Nom (Vsup) | 3.3V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Terminal Form | GULL WING |
| Terminal Pitch | 0.65mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| ECCN | EAR99 |
| HTS Code | 8542.39.00.90 |
| Country of Origin | Malaysia |
Where can I find the SN74LVC373ADBRG4 datasheet?
SN74LVC373ADBRG4 Datasheet DownloadOfficial datasheet from Texas Instruments
What are equivalent replacements for SN74LVC373ADBRG4?
No known alternates. Submit an RFQ and our team can suggest alternatives.
Frequently Asked Questions
How does the transparent latch mode work in SN74LVC373ADBRG4?
When the latch enable (LE) pin is held high, the 8 outputs follow their corresponding data inputs in real time — transparent mode. When LE goes low, the device latches and holds the last input state on all 8 outputs regardless of subsequent input changes. This enables address hold in multiplexed bus designs with a single control signal.
Can SN74LVC373ADBRG4 interface directly between a 5 V peripheral bus and a 3.3 V microcontroller?
Yes. The LVC family inputs are 5 V tolerant, so the device can accept 5 V signals on its data inputs while running from a 3.3 V supply and driving 3.3 V-compatible outputs. This allows direct bus translation without an external level-shifter when the LVC output voltage is sufficient for the receiving device's input threshold.
What is the output drive strength of SN74LVC373ADBRG4, and how many TTL loads can it drive?
The device can sink 24 mA in the low state and source 12 mA in the high state per output pin, with a 50 pF specified load capacitance. At 3.3 V this is sufficient to drive at least 10 standard LVTTL loads per output or the equivalent bus capacitance on a PCB trace without signal integrity degradation.
For address latching in an 8051 microcontroller design, how does SN74LVC373ADBRG4 compare to the 74HC373?
SN74LVC373ADBRG4 extends the classic 74HC373 function with a wider 1.65 V to 5.5 V supply range versus the 74HC373's 2 V to 6 V range, and adds 5 V tolerant inputs that the 74HC373 lacks. For a 3.3 V 8051 variant with a 5 V peripheral bus, the LVC device removes the need for series resistors on address latch inputs, simplifying the design.
What package is SN74LVC373ADBRG4, and how does SSOP compare to the SOIC variant for space-constrained PCBs?
SN74LVC373ADBRG4 comes in a 20-pin SSOP with a 0.65 mm lead pitch, which reduces PCB footprint by approximately 40% compared to the standard 20-pin wide SOIC. For space-constrained designs such as handheld instruments or stacked bus board architectures, the SSOP format allows tighter component placement while retaining standard SMT reflow compatibility.
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About Texas Instruments
Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
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