SN74LS173ANG4 Texas Instruments Integrated Circuit (Dual-In-Line Packages) In Stock
SN74LS173ANG4 is a 4-bit D-type register with 3-state outputs from the LS TTL logic family, operating from a 5 V supply. It stores 4 bits of data on the rising clock edge with separate data enable and output enable controls. Packaged in a 16-pin DIP, it is used for bus interfacing, temporary data storage, and register bank implementations in TTL digital systems.
- Manufacturer
- Texas Instruments
- Package
- Dual-In-Line Packages
- Pin Count
- 16
- Lifecycle
- ACTIVE
- Datasheet
- SN74LS173ANG4 Datasheet PDF
- Category
- Integrated Circuit
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- 4-bit edge-triggered D register with independent clock enable inputs
- 3-state outputs allow shared bus connections with multiple register devices
- LS TTL logic family operating from 5 V supply
- Separate data input enable and output enable control pins
- Rising-edge clock capture for deterministic synchronous operation
- 16-pin DIP package for through-hole breadboard and PCB prototyping
Applications
The SN74LS173ANG4 serves as a 4-bit data storage register in TTL-based digital systems, including legacy microprocessor address latches and I/O port buffers. Its 3-state output capability enables multiple register devices to drive a shared 4-bit bus without contention, which is common in address decoding and data multiplexing circuits. The device is also used in educational electronics courses and vintage computer restoration projects that rely on 5 V TTL logic families.
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
Alternate & Equivalent Parts
No known alternates. Submit an RFQ and our team can suggest alternatives.
Frequently Asked Questions
How do the separate data enable and output enable pins on the SN74LS173ANG4 improve control in bus-sharing designs?
The data input enable pins gate whether new data is clocked into the register, allowing selective updates without disabling outputs. The separate 3-state output enable independently disconnects all 4 outputs from the bus without affecting stored data. This two-level control lets designers share a 5 V TTL bus among multiple SN74LS173ANG4 devices by enabling only one output at a time while loading data into others.
For restoring a vintage 5 V TTL-based computer, does this register interface directly with standard LS and HC logic families?
The SN74LS173ANG4 operates from a 5 V supply with LS TTL output voltage levels, providing a typical high output of at least 2.4 V and typical low output below 0.5 V. These levels are directly compatible with other LS TTL and 5 V HC CMOS inputs, making it a drop-in replacement in systems using SN74LS and SN74HC series ICs without any level shifting.
How many bits can this register store, and is it sufficient for nibble-wide data path applications?
The device stores exactly 4 bits simultaneously, making it ideal for nibble-wide data paths found in BCD processing, hexadecimal digit storage, and 4-bit processor bus interfaces. Two SN74LS173ANG4 devices can be cascaded to form an 8-bit register bank, requiring only 2 ICs and a common clock, while each independently manages its own 4-bit output enable for bus arbitration.
What propagation delay can be expected from clock edge to output transition at 5 V supply?
In the LS TTL family operating at 5 V, the typical clock-to-output propagation delay for the SN74LS173ANG4 is approximately 25 ns to 30 ns. This corresponds to a maximum clock frequency of roughly 33 MHz, which is adequate for synchronous bus applications and address latching in legacy microprocessor systems running at 8 MHz to 20 MHz.
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Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
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