SN74HC112DE4 Texas Instruments Integrated Circuit (Small Outline Packages) In Stock
SN74HC112DE4 is a dual negative-edge-triggered JK flip-flop in a 16-pin SOIC package from Texas Instruments HC/UH family, operating up to 20 MHz and sourcing 4 mA output current, suitable for high-speed digital logic sequencing and state machine designs.
- Manufacturer
- Texas Instruments
- Package
- Small Outline Packages
- Pin Count
- 16
- Lifecycle
- OBSOLETE
- Datasheet
- SN74HC112DE4 Datasheet PDF
- Category
- Integrated Circuit
- Temp Range
- -40.0°C to 85.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
What are the key features of SN74HC112DE4?
- Dual negative-edge-triggered JK flip-flops in a single 16-pin SOIC package reduce IC count in sequential logic designs
- HC/UH family CMOS technology operates from 2 V to 6 V supply and achieves up to 20 MHz toggle frequency at 50 pF load
- 4 mA output sink/source current drives multiple HC-family inputs directly without buffer amplification
- Individual asynchronous set and reset inputs on each flip-flop enable independent initialization of both state elements
- RoHS-compliant e4 green finish in tube packaging supports both prototype and volume production assembly
What is SN74HC112DE4 used for?
The SN74HC112DE4 is used in digital sequential logic designs including divide-by-2 frequency dividers, shift registers, and finite state machine building blocks in microcontroller peripheral boards and programmable logic training platforms. Its dual JK topology allows two independent one-bit memory elements to share a single package, reducing PCB footprint in compact glue-logic circuits between FPGA and discrete I/O expanders. It also appears in educational hardware and legacy system repair where standard 74HC-series JK flip-flop functions are required in an easily sourced SOIC-16 form factor.
What are the specifications of SN74HC112DE4?
| YTEOL | 0 |
| Family | HC/UH |
| JESD-30 Code | R-PDSO-G16 |
| JESD-609 Code | e4 |
| Load Capacitance (CL) | 50pF |
| Logic IC Type | J-K FLIP-FLOP |
| Max Frequency@Nom-Sup | 20000000Hz |
| Max I(ol) | 0.004A |
| Number of Bits | 2 |
| Number of Functions | 2 |
| Output Polarity | COMPLEMENTARY |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | SOP16,.25 |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE |
| Packing Method | TUBE |
| Peak Reflow Temperature (Cel) | 260 |
| Prop. Delay@Nom-Sup | 31ns |
| Propagation Delay (tpd) | 155ns |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Terminal Form | GULL WING |
| Terminal Pitch | 1.27mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Trigger Type | NEGATIVE EDGE |
| fmax-Min | 24MHz |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| HTS Code | 8542.39.00.60 |
Where can I find the SN74HC112DE4 datasheet?
SN74HC112DE4 Datasheet DownloadOfficial datasheet from Texas Instruments
What are equivalent replacements for SN74HC112DE4?
Compatible alternatives and drop-in replacements for SN74HC112DE4:
Flip-Flop, HC Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16
J-K Flip-Flop, HC/UH Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16
Frequently Asked Questions
At what maximum clock frequency can the SN74HC112DE4 toggle, and what load capacitance is specified at that rate?
The SN74HC112DE4 is rated for a maximum toggle frequency of 20 MHz at a nominal supply and 50 pF load capacitance. At lower supply voltages or higher capacitive loads the maximum frequency decreases, so designers should verify timing margins using the datasheet propagation delay curves when driving traces with parasitic capacitance above 50 pF in high-speed state machine applications.
Can the SN74HC112DE4 be used as a divide-by-2 frequency prescaler, and what input frequency range is practical?
Yes, by connecting the Q-bar output back to the J and K inputs, each flip-flop in the SN74HC112DE4 forms a toggle flip-flop that divides the input clock by 2. With a 20 MHz maximum toggle rate at 50 pF load, the device can divide clock signals up to 20 MHz, producing a 10 MHz square wave output. Two stages in cascade divide by 4, yielding a 5 MHz output from a 20 MHz source.
What supply voltage range does SN74HC112DE4 accept, and does it interface directly with 3.3 V logic systems?
The SN74HC112DE4 belongs to the HC/UH CMOS family and operates from 2 V to 6 V. It can be powered from a 3.3 V rail and accepts input HIGH thresholds of approximately 0.7× VCC (2.31 V at 3.3 V supply), so it interfaces directly with 3.3 V microcontroller or FPGA outputs. At 5 V it provides stronger output drive and faster switching, with 4 mA guaranteed output sink current adequate to drive multiple HC-family gate inputs.
For procurement planning, how does the SN74HC112DE4 compare with the SN74HC112AN DIP version in terms of package and assembly?
The SN74HC112DE4 is in a 16-pin SOIC package with 1.27 mm pin pitch, which is compatible with standard SMT reflow soldering on automated assembly lines. The DIP version (SN74HC112AN) uses through-hole 2.54 mm pitch pins suited for hand soldering and socketing in prototypes. The SOIC DE4 variant occupies roughly 60% less board area than the DIP, and its e4 green finish meets RoHS directives for lead-free production, making it the preferred choice for production PCBs.
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About Texas Instruments
Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
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