SN74AVC126PW Texas Instruments Integrated Circuit (Small Outline Packages) In Stock

Texas Instruments SN74AVC126PW is a quad single-bit bus buffer/line driver from the AVC logic family with active-high output enables, 1.65 V to 3.6 V supply, and 12 mA output sink current. Available in a 14-pin TSSOP package for high-speed level shifting and bus buffering.

OBSOLETEIntegrated CircuitVerified Jun 2026
Package / Visual Reference
SN74AVC126PWSmall Outline Packages
Quick Facts
Manufacturer
Texas Instruments
Package
Small Outline Packages
Pin Count
14
Lifecycle
OBSOLETE
Category
Integrated Circuit
Temp Range
-40.0°C to 85.0°C
RoHS
Compliant
Lead Time
3–7 business days
Shipping
DHL Express · Worldwide

What are the key features of SN74AVC126PW?

  • Quad unidirectional bus buffer with individual active-high output enables for independent channel control
  • AVC logic family supporting 1.65 V to 3.6 V supply operation with sub-nanosecond propagation delays
  • 12 mA output sink current at 15 pF load capacitance enabling reliable drive of high-capacitance bus lines
  • 14-pin TSSOP package minimizing board space in dense multi-rail logic interface designs

What is SN74AVC126PW used for?

The SN74AVC126PW is used in mixed-voltage logic interfaces where signals from a 3.3 V processor must be buffered and driven onto a 1.8 V or 2.5 V bus without level inversion. Its four independent enable-controlled channels make it suitable for I/O expansion, multiplexed bus arbitration, and signal isolation in FPGAs, microcontroller development boards, and communication interface cards.

What are the specifications of SN74AVC126PW?

YTEOL0
Control TypeENABLE HIGH
Count DirectionUNIDIRECTIONAL
FamilyAVC
JESD-30 CodeR-PDSO-G14
Load Capacitance (CL)15pF
Logic IC TypeBUS DRIVER
Max I(ol)0.012A
Number of Bits1
Number of Functions4
Number of Ports2
Output Characteristics3-STATE
Output PolarityTRUE
Package Body MaterialPLASTIC/EPOXY
Package Equivalence CodeTSSOP14,.25
Package ShapeRECTANGULAR
Package StyleSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Packing MethodTUBE
Power Supply Current-Max (ICC)0.04mA
Qualification StatusNot Qualified
Supply Voltage-Max (Vsup)3.6V
Supply Voltage-Min (Vsup)1.4V
Supply Voltage-Nom (Vsup)2.5V
Surface MountYES
TechnologyCMOS
Temperature GradeINDUSTRIAL
Terminal FormGULL WING
Terminal Pitch0.65mm
Terminal PositionDUAL
PackageSmall Outline Packages

Compliance & Regulatory

RoHS StatusCompliant
Lead-FreeYes (Pb-Free)
HTS Code8542.39.00.60

Where can I find the SN74AVC126PW datasheet?

SN74AVC126PW Datasheet Download

Official datasheet from Texas Instruments

What are equivalent replacements for SN74AVC126PW?

Compatible alternatives and drop-in replacements for SN74AVC126PW:

SN74AVC126PWRTexas Instruments

Bus Driver, AVC Series, 4-Func, 1-Bit, True Output, CMOS, PDSO14

View Part →
SN74AVC126DGVTexas Instruments

Bus Driver, AVC Series, 4-Func, 1-Bit, True Output, CMOS, PDSO14

View Part →

Frequently Asked Questions

What supply voltage range does the SN74AVC126PW support, and how does it fit mixed-voltage designs?

The SN74AVC126PW operates from 1.65 V to 3.6 V, making it compatible with 1.8 V, 2.5 V, and 3.3 V logic families. In a mixed-voltage system where a 3.3 V microcontroller communicates with a 1.8 V FPGA, the AVC126 can buffer the 3.3 V signals onto the 1.8 V bus without discrete level-shift resistors, simplifying the interface and reducing propagation delay.

How do the independent active-high output enables on SN74AVC126PW benefit bus multiplexing designs?

Each of the 4 channels in the SN74AVC126PW has its own active-high OE pin, allowing a designer to selectively enable or tristate individual data lines. This supports bus multiplexing schemes where different sources time-share a common bus, with each source's driver disabled when not transmitting to prevent bus contention — a key requirement in SPI or parallel data bus architectures with 4 or more peripherals.

For a high-speed serial interface, what is the typical propagation delay of SN74AVC126PW at 3.3 V?

The AVC logic family is designed for sub-nanosecond propagation delays at 3.3 V, with typical tpd values in the range of 0.7 ns to 1.5 ns at 3.3 V supply and 15 pF load. This ultra-low latency makes the SN74AVC126PW suitable for buffering high-speed signals in PCIe, DDR memory interfaces, and LVTTL bus applications operating at 200 MHz and above.

How does SN74AVC126PW compare to SN74LVC126A for a 3.3 V to 1.8 V interface?

Both devices offer quad bus buffering with active-high enables, but the AVC family (1.65 V to 3.6 V) is optimized for lower supply voltages and achieves faster propagation delays than the LVC family (1.65 V to 5.5 V). For a dedicated 3.3 V to 1.8 V interface requiring minimum latency, the SN74AVC126PW is the preferred choice; the SN74LVC126A is better when 5 V tolerance or a wider supply range is needed.

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About Texas Instruments

Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.

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Lead Time3-7 business days
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Their engineering team helped us find a pin-compatible alternative when our original MCU went EOL.

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Marco Rossi
CTO, AutoDrive Systems, Italy