SN74AUP1G02DRLRG4 Texas Instruments Integrated Circuit (SO Transistor Flat Lead) In Stock
The SN74AUP1G02DRLRG4 is a single 2-input NOR gate from Texas Instruments in the ultra-low-power AUP/ULP logic family. Operating from 0.8 V to 3.6 V, it achieves sub-microwatt quiescent power making it ideal for IoT and wearable designs. Packaged in a 6-pin SOT-563 very thin small outline, it suits ultra-compact PCB layouts.
- Manufacturer
- Texas Instruments
- Package
- SO Transistor Flat Lead
- Pin Count
- 5
- Lifecycle
- OBSOLETE
- Datasheet
- SN74AUP1G02DRLRG4 Datasheet PDF
- Category
- Integrated Circuit
- Temp Range
- -40.0°C to 85.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
What are the key features of SN74AUP1G02DRLRG4?
- Single 2-input NOR gate with ultra-low quiescent power in sub-microwatt range at 1.8 V
- Wide supply voltage range from 0.8 V to 3.6 V covering 1.8 V and 3.3 V IoT systems
- Very thin 6-pin SOT-563 package measuring under 1.6 mm x 1.6 mm for wearable integration
- AUP family optimized for minimum power at 1.8 V while maintaining fast switching speed
- Green and RoHS-compliant packaging in tape-and-reel for high-volume automated assembly
What is SN74AUP1G02DRLRG4 used for?
The SN74AUP1G02DRLRG4 is used in wearables, IoT sensor nodes, and portable medical devices where logic glue circuits must consume minimal current from 1.8 V or lower supply rails. Its ultra-low power draw makes it suitable for always-on combinational logic in interrupt gating, wake-on-event circuits, and enable signal generation running from coin cell or energy-harvesting supplies. The tiny SOT-563 package allows placement next to microcontrollers and RF SoCs in space-constrained modules with PCB areas under 1 cm².
What are the specifications of SN74AUP1G02DRLRG4?
| YTEOL | 0 |
| Family | AUP/ULP/V |
| JESD-30 Code | R-PDSO-F5 |
| JESD-609 Code | e4 |
| Logic IC Type | NOR GATE |
| Number of Functions | 1 |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | FL6,.047,20 |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE, VERY THIN PROFILE |
| Packing Method | TR |
| Peak Reflow Temperature (Cel) | 260 |
| Qualification Status | Not Qualified |
| Schmitt Trigger | NO |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 0.8V |
| Supply Voltage-Nom (Vsup) | 3.3V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Terminal Form | FLAT |
| Terminal Pitch | 0.5mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Package | SO Transistor Flat Lead |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| HTS Code | 8542.39.00.60 |
Where can I find the SN74AUP1G02DRLRG4 datasheet?
SN74AUP1G02DRLRG4 Datasheet DownloadOfficial datasheet from Texas Instruments
What are equivalent replacements for SN74AUP1G02DRLRG4?
Compatible alternatives and drop-in replacements for SN74AUP1G02DRLRG4:
D Flip-Flop, AUP/ULP/V Series, 1-Func, Positive Edge Triggered, Complementary Output, CMOS, PDSO8
Frequently Asked Questions
At what supply voltage does the SN74AUP1G02DRLRG4 achieve its minimum quiescent power, and how does this compare to standard 74HC logic?
The SN74AUP1G02DRLRG4 achieves its lowest quiescent current at 1.8 V, drawing typically under 1 µA in static operation compared to 74HC logic which can draw 80 µA or more at 5 V. This roughly 80x reduction in static current makes the AUP gate the preferred choice for always-on combinational logic in coin-cell-powered IoT devices with multi-year battery life targets.
Can the SN74AUP1G02DRLRG4 interface directly between a 1.8 V microcontroller output and a 3.3 V logic input without level translation?
The SN74AUP1G02DRLRG4 accepts input signals from 0 V up to its supply voltage plus 0.5 V, and its output swings to within the standard CMOS high and low thresholds of its supply rail. If powered at 3.3 V, a 1.8 V input high level of approximately 1.5 V still exceeds the minimum VIH threshold, allowing direct interfacing, though the user should verify exact threshold values from the datasheet for the specific supply voltage combination.
How small is the SN74AUP1G02DRLRG4's SOT-563 package footprint, and why does this matter for wearable PCB design?
The 6-pin SOT-563 package measures approximately 1.6 mm x 1.6 mm, one of the smallest standard logic packages available. In wearable devices where total PCB area is often under 5 cm², each logic gate occupying only 2.56 mm² instead of the 19 mm² of a conventional SOIC-8 frees up space for larger battery cells or additional sensors, directly improving wearable device battery life and functionality.
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About Texas Instruments
Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
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