SN74ALS137AD Texas Instruments Integrated Circuit (Other) In Stock
SN74ALS137AD is a 3-line to 8-line decoder/demultiplexer with address latches in ALS logic family, featuring 50pF load capacitance, 12mA output current, and 16-pin SOIC package. From $2 in stock with worldwide shipping.
- Manufacturer
- Texas Instruments
- Package
- Other
- Pin Count
- 16
- Lifecycle
- OBSOLETE
- Datasheet
- SN74ALS137AD Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $2.0000(MOQ 1)
- Temp Range
- ?°C to 70.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- 3-line to 8-line decoding with integrated address latches for reduced external component count
- ALS (Advanced Low-power Schottky) technology for high-speed operation with low power consumption
- 50pF load capacitance and 12mA output current for robust signal driving
- 16-pin SOIC (R-PDSO-G16) package for compact PCB footprint
- Latched inputs simplify bus interface design in multiplexed systems
Applications
The SN74ALS137AD is widely used in address decoding for microprocessor and microcontroller bus systems, enabling efficient memory and I/O device selection. Its integrated address latches make it ideal for demultiplexing address/data buses in embedded systems and industrial control applications. It is also suitable for data routing, signal distribution, and display driving in telecommunications and instrumentation equipment.
Specifications
| YTEOL | 0 |
| Additional Feature | ADDRESS LATCHES |
| Family | ALS |
| Input Conditioning | LATCHED |
| JESD-30 Code | R-PDSO-G16 |
| JESD-609 Code | e4 |
| Load Capacitance (CL) | 50pF |
| Logic IC Type | 3-LINE TO 8-LINE DECODER |
| Max I(ol) | 0.012A |
| Number of Bits | 8 |
| Number of Functions | 1 |
| Output Polarity | INVERTED |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | SOP16,.25 |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE |
| Packing Method | TUBE |
| Peak Reflow Temperature (Cel) | 260 |
| Power Supply Current-Max (ICC) | 10mA |
| Prop. Delay@Nom-Sup | 20ns |
| Propagation Delay (tpd) | 20ns |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | YES |
| Technology | TTL |
| Temperature Grade | COMMERCIAL |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Terminal Form | GULL WING |
| Terminal Pitch | 1.27mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Package | Other |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| ECCN | EAR99 |
| HTS Code | 8542.39.00.60 |
| Country of Origin | Mexico |
Alternate & Equivalent Parts
No known alternates. Submit an RFQ and our team can suggest alternatives.
Frequently Asked Questions
What is the logic family and key electrical specifications of the SN74ALS137AD?
The SN74ALS137AD belongs to the ALS (Advanced Low-power Schottky) logic family. Key specs include a maximum output low current (IOL) of 12mA, a load capacitance (CL) of 50pF, and 8 decoded outputs from 3 address inputs with built-in latches for address hold capability.
What are the typical applications for the SN74ALS137AD decoder/demultiplexer?
The SN74ALS137AD is commonly used in microprocessor address decoding, memory chip select generation, I/O port expansion, and demultiplexing multiplexed address/data buses. Its address latch feature makes it especially suitable for 8051, Z80, and similar bus-multiplexed architectures in embedded and industrial control systems.
What package does the SN74ALS137AD come in, and are there compatible alternatives?
The SN74ALS137AD comes in a 16-pin SOIC package (JESD-30 code R-PDSO-G16). Compatible alternatives include the 74HCT137 and 74F137 in similar SOIC packages from other manufacturers, offering equivalent 3-to-8 line decoding with address latches for drop-in replacement in most designs.
How does the address latch function in the SN74ALS137AD work?
The SN74ALS137AD features latched address inputs that capture and hold the 3-bit address when the latch enable signal is asserted. This allows the device to maintain a stable decoded output even after the address bus changes, making it ideal for systems where the address and data share the same bus lines.
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| Qty. | Unit Price | Ext. Price |
|---|---|---|
| 1+ | $3.0800 | $3.08 |
| 100+ | $2.3100 | $231.00 |
| 1000+ | $2.0000 | $2000.00 |
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