PTLV9352IPWR Texas Instruments Integrated Circuit (Small Outline Packages) In Stock
Texas Instruments PTLV9352IPWR is a dual rail-to-rail output operational amplifier with 40 V supply range, 3.5 MHz bandwidth, and MUX-friendly input architecture in an 8-pin SOIC package. It delivers 95 dB minimum CMRR and 2000 µV maximum input offset for cost-sensitive signal conditioning. Ideal for multiplexed ADC front-ends and sensor signal chains in industrial and consumer designs.
- Manufacturer
- Texas Instruments
- Package
- Small Outline Packages
- Pin Count
- 8
- Lifecycle
- OBSOLETE
- Datasheet
- PTLV9352IPWR Datasheet PDF
- Category
- Integrated Circuit
- Temp Range
- -40.0°C to 125.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
What are the key features of PTLV9352IPWR?
- 3.5 MHz gain-bandwidth product for wide-signal-chain bandwidth in dual-channel designs
- 40 V supply voltage range supports single 5 V to 40 V or dual ±20 V power rails
- Rail-to-rail output swing maximizes ADC input range and dynamic range utilization
- MUX-friendly input architecture eliminates settling errors in switched-input filter designs
- 95 dB minimum CMRR for accurate differential signal rejection in noisy environments
What is PTLV9352IPWR used for?
The PTLV9352IPWR is well-suited for industrial sensor signal conditioning front-ends where an analog multiplexer switches between multiple 4 mA to 20 mA current loop inputs before ADC conversion. Its MUX-friendly input stage prevents charge injection errors during channel switching, enabling faster settling times below 1 µs for high-throughput data acquisition systems. Consumer audio amplifiers and building automation controllers also use its 40 V supply tolerance and rail-to-rail output for direct 24 V bus-powered applications.
What are the specifications of PTLV9352IPWR?
| Date Of Intro | 2019-11-22 |
| YTEOL | 0 |
| Amplifier Type | OPERATIONAL AMPLIFIER |
| Architecture | VOLTAGE-FEEDBACK |
| Common-mode Reject Ratio-Min | 95dB |
| Common-mode Reject Ratio-Nom | 110dB |
| Frequency Compensation | YES |
| Input Offset Voltage-Max | 2000 µV |
| JESD-30 Code | R-PDSO-G8 |
| Low-Bias | NO |
| Low-Offset | NO |
| Micropower | NO |
| Neg Supply Voltage Limit-Max | -21 V |
| Number of Functions | 2 |
| Package Body Material | PLASTIC/EPOXY |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH |
| Packing Method | TR |
| Power | NO |
| Programmable Power | NO |
| Slew Rate-Nom | 20V/us |
| Supply Current-Max | 1.6mA |
| Supply Voltage Limit-Max | 21V |
| Surface Mount | YES |
| Technology | BICMOS |
| Temperature Grade | AUTOMOTIVE |
| Terminal Form | GULL WING |
| Terminal Pitch | 0.65mm |
| Terminal Position | DUAL |
| Unity Gain BW-Nom | 3500 |
| Voltage Gain-Min | 630957.34 |
| Wideband | NO |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| ECCN | EAR99 |
| HTS Code | 8542.33.00.01 |
Where can I find the PTLV9352IPWR datasheet?
PTLV9352IPWR Datasheet DownloadOfficial datasheet from Texas Instruments
What are equivalent replacements for PTLV9352IPWR?
No known alternates. Submit an RFQ and our team can suggest alternatives.
Frequently Asked Questions
How does PTLV9352IPWR's MUX-friendly input architecture improve settling time in multiplexed sensor designs?
The MUX-friendly input architecture of PTLV9352IPWR prevents the input stage from saturating or injecting charge when the analog multiplexer switches between sensor channels. This allows the amplifier output to settle within 1 µs after channel switching at 3.5 MHz bandwidth, compared to 10 µs to 50 µs for conventional op-amps that require full recovery from an overdrive state at 40 V supply.
What supply voltage configurations does PTLV9352IPWR support, and how does this affect industrial 24 V applications?
The PTLV9352IPWR operates from a single supply of 5 V to 40 V or a dual supply of ±2.5 V to ±20 V. In industrial 24 V bus-powered systems, it can run directly from the 24 V rail without a dedicated voltage regulator, reducing BOM by 1 to 2 components per channel and saving 50 mW to 200 mW of regulator loss across a multi-channel signal conditioning board.
How does the dual-channel integration of PTLV9352IPWR reduce PCB area versus two single-channel op-amps?
The PTLV9352IPWR integrates 2 op-amps in a single 8-pin SOIC package measuring approximately 5.0 mm × 4.0 mm, versus two SOT-23-5 single-channel devices occupying 2 × 8.0 mm² = 16 mm². This 50% area reduction is significant in 8-channel or 16-channel sensor acquisition cards where op-amp area can account for 20% to 30% of total PCB footprint.
When would PTLV9352IPWR be a cost-effective alternative to precision low-offset op-amps in sensor front-end designs?
The PTLV9352IPWR is a cost-effective choice when system error budgets can tolerate a 2000 µV input offset, which corresponds to 0.2% full-scale error on a 1 V input range. For 10-bit or 12-bit ADC systems with 1 mV to 5 mV LSB values, the 2 mV offset is within 1 LSB to 2 LSB, making precision-grade zero-drift amplifiers with 50 µV to 100 µV offset and 3× to 5× higher cost unnecessary.
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About Texas Instruments
Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
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