MCP23S17T-E/SO Microchip Integrated Circuit (Small Outline Packages) In Stock
The Microchip MCP23S17T-E/SO is a 16-bit SPI I/O expander providing 16 configurable GPIO pins through a 10 MHz SPI interface. It features interrupt-on-change and cascadable addressing in a 28-pin SOIC package. Available from stock worldwide with fast delivery.
- Manufacturer
- Microchip
- Package
- Small Outline Packages
- Pin Count
- 28
- Lifecycle
- ACTIVE
- Datasheet
- MCP23S17T-E/SO Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $1.2400(MOQ 1)
- Temp Range
- -40.0°C to 125.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
What are the key features of MCP23S17T-E/SO?
- 16-bit bidirectional GPIO expansion over a 10 MHz SPI bus, allowing cascading of up to 8 devices for 128 additional I/O lines
- Interrupt-on-change output per port enables event-driven MCU wake-up without continuous polling, reducing CPU load
- 28-pin SOIC package with 1.7 V to 5.5 V operation and Pb-free construction for broad compatibility with 3.3 V and 5 V systems
What is MCP23S17T-E/SO used for?
The MCP23S17T-E/SO is widely used to expand the I/O count of resource-constrained microcontrollers in HMI panels, relay driver boards, and industrial automation controllers. Its SPI interface at up to 10 MHz allows rapid GPIO updates over a shared bus alongside sensors and displays, while interrupt outputs let the host MCU sleep between events. Cascading up to 8 devices provides as many as 128 additional pins from a single 4-wire SPI bus.
What are the specifications of MCP23S17T-E/SO?
| Pbfree Code | Yes |
| Manufacturer Package Code | SOIC-28 |
| Factory Lead Time | 1Week |
| YTEOL | 8 |
| CPU Family | MCP23X17 |
| Clock Frequency-Max | 10MHz |
| JESD-30 Code | R-PDSO-G28 |
| JESD-609 Code | e3 |
| Number of Bits | 16 |
| Number of I/O Lines | 16 |
| Number of Ports | 2 |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | SOP28,.4 |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE |
| Peak Reflow Temperature (Cel) | 250 |
| Qualification Status | Not Qualified |
| Supply Current-Max | 1mA |
| Supply Voltage-Max | 5.5V |
| Supply Voltage-Min | 4.5V |
| Supply Voltage-Nom | 5V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | AUTOMOTIVE |
| Terminal Finish | Matte Tin (Sn) |
| Terminal Form | GULL WING |
| Terminal Pitch | 1.27mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| uPs/uCs/Peripheral ICs Type | PARALLEL IO PORT, GENERAL PURPOSE |
| ## MCP23S17T-E/SO Alternates Showing results | Image |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| ECCN | EAR99 |
| HTS Code | 8542.39.00.01 |
| Country of Origin | Thailand |
Where can I find the MCP23S17T-E/SO datasheet?
MCP23S17T-E/SO Datasheet DownloadOfficial datasheet from Microchip
What are equivalent replacements for MCP23S17T-E/SO?
Compatible alternatives and drop-in replacements for MCP23S17T-E/SO:
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Frequently Asked Questions
How many MCP23S17T-E/SO devices can be cascaded on a single SPI bus, and how many total I/O pins does that provide?
Up to 8 MCP23S17T-E/SO devices can share one SPI bus using hardware address pins A0–A2, yielding 128 additional I/O lines from a single 4-wire interface. Each device contributes 16 independently configurable GPIO pins, making it practical to drive large relay matrices or LED arrays without consuming MCU port pins.
What SPI clock speed does the MCP23S17T-E/SO support, and does it require level shifting for a 3.3 V MCU?
The MCP23S17T-E/SO supports SPI clock frequencies up to 10 MHz and operates from 1.7 V to 5.5 V, so it connects directly to 3.3 V microcontrollers without any level-shifting buffer. This wide supply range reduces external component count and simplifies mixed-voltage board designs.
How does the interrupt-on-change feature of the MCP23S17T-E/SO benefit battery-powered or RTOS-based designs?
The interrupt-on-change outputs (INTA and INTB) assert when any enabled GPIO transitions, letting the host MCU remain in a low-power sleep state rather than polling 16 pins at a fixed rate. In RTOS designs this maps cleanly to a semaphore or event flag, triggering a handler task only when needed and avoiding wasted CPU cycles at typical 10 MHz bus speeds.
For a compact industrial controller PCB, how does the 28-pin SOIC footprint of the MCP23S17T-E/SO compare to a DIP alternative?
The SOIC-28 package occupies roughly 110 mm² of PCB area, compared to approximately 400 mm² for a through-hole DIP-28, saving about 70% of board space. The SOIC footprint also supports automated reflow assembly, lowering production cost and improving placement accuracy in high-volume industrial builds.
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