LT1965EQ#PBF Analog Devices Integrated Circuit (Other) In Stock
The LT1965EQ#PBF is a low-noise adjustable LDO linear regulator from Analog Devices delivering up to 1.1 A output current with only 0.31 V typical dropout voltage. It targets noise-sensitive applications such as PLL supplies, ADC references, and RF circuitry in a 5-pin SOT-23 package.
- Manufacturer
- Analog Devices
- Package
- Other
- Pin Count
- 5
- Lifecycle
- ACTIVE
- Datasheet
- LT1965EQ#PBF Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $3.5282(MOQ 1)
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- Ultra-low noise output: 40 µVRMS from 10 Hz to 100 kHz, ideal for PLL, VCO, and ADC supply rails
- High output current: 1.1 A continuous with only 0.31 V typical dropout voltage minimizing power dissipation
- Adjustable output voltage set with two external resistors covering wide range of regulated voltages
- 5-pin SOT-23 package with load regulation max 1.33% for compact, high-performance LDO designs
Applications
The LT1965EQ#PBF is designed for noise-sensitive analog supply rails where switching regulators introduce unacceptable ripple onto PLLs, VCOs, ADC reference inputs, and RF front ends operating from 100 MHz to several GHz. Its 40 µVRMS noise floor from 10 Hz to 100 kHz keeps phase-noise contributions well below the floor of most oscillators, making it a preferred post-regulator after a switching pre-regulator. The 1.1 A current capability also serves as a general-purpose high-current LDO for FPGAs, DSPs, and mixed-signal processors requiring clean supplies derived from a higher-voltage intermediate bus.
Specifications
| Pbfree Code | No |
| Manufacturer Package Code | 05-08-1461 |
| YTEOL | 10 |
| Adjustability | ADJUSTABLE |
| Dropout Voltage1-Max | 0.49V |
| Dropout Voltage1-Nom | 0.31V |
| JESD-30 Code | R-PSSO-G5 |
| JESD-609 Code | e3 |
| Line Regulation-Max (%/V) | 0.0372 |
| Load Regulation-Max(%) | 1.3333% |
| Number of Functions | 1 |
| Number of Outputs | 1 |
| Operating Temperature TJ-Max | 125°C |
| Operating Temperature TJ-Min | -40 °C |
| Output Current1-Max | 1.1A |
| Output Voltage1-Max | 19.5V |
| Output Voltage1-Min | 1.2V |
| Package Body Material | PLASTIC/EPOXY |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE |
| Peak Reflow Temperature (Cel) | 260 |
| Qualification Status | Not Qualified |
| Regulator Type | ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR |
| Surface Mount | YES |
| Technology | BIPOLAR |
| Terminal Finish | Matte Tin (Sn) |
| Terminal Form | GULL WING |
| Terminal Pitch | 1.702mm |
| Terminal Position | SINGLE |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Package | Other |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| ECCN | EAR99 |
| HTS Code | 8542.39.00.01 |
| Country of Origin | Malaysia |
Alternate & Equivalent Parts
No known alternates. Submit an RFQ and our team can suggest alternatives.
Frequently Asked Questions
What output noise specification does the LT1965EQ#PBF achieve and why does it matter for PLL supply design?
The LT1965EQ#PBF delivers approximately 40 µVRMS of integrated output noise from 10 Hz to 100 kHz, which is among the lowest available in a 1 A LDO class. PLL voltage-controlled oscillators translate supply noise directly into phase noise at a rate determined by the VCO's supply-pushing coefficient, typically 1 MHz/V to 10 MHz/V. At 40 µVRMS supply noise, the resulting phase-noise degradation is below -160 dBc/Hz at 10 kHz offset for most 1 GHz VCOs, making the LT1965EQ#PBF the preferred regulator for cellular and wireless infrastructure PLL supplies.
How low is the dropout voltage of the LT1965EQ#PBF at 1.1 A and what input voltage does this require for a 3.3 V output?
The LT1965EQ#PBF has a typical dropout voltage of 0.31 V at 1.1 A load, with a maximum of 0.49 V at full load and 25°C. For a regulated 3.3 V output at full 1.1 A current, the input supply must exceed 3.3 V + 0.49 V = 3.79 V to guarantee regulation. This low headroom allows efficient operation from a 3.7 V LiPo cell or a 5 V system bus with minimal dissipation, saving approximately 180 mW compared to a 0.6 V dropout regulator at the same current.
How is the output voltage of the LT1965EQ#PBF set in a circuit and what resistor values are typical?
The LT1965EQ#PBF uses an adjustable feedback architecture where output voltage is set by a resistor divider between VOUT, the ADJ pin, and ground. With a 1.22 V reference at the ADJ pin, the equation is VOUT = 1.22 × (1 + R1/R2). For a 3.3 V output, a typical combination is R1 = 16.9 kΩ and R2 = 10 kΩ. Using 1% tolerance resistors limits the output voltage error to within ±1.5%, well within the 1.33% maximum load regulation spec of the device.
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About Analog Devices
Analog Devices (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing integrated circuits used in virtually all types of electronic equipment.
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| 1+ | $14.1300 | $14.13 |
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| 3+ | $10.3620 | $31.09 |
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| 250+ | $3.5282 | $882.04 |
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