LMK00306SQX/NOPB Texas Instruments Integrated Circuit (Quad Flat No-Lead) In Stock
The LMK00306SQX/NOPB is a 3:7 clock fanout buffer and multiplexer from Texas Instruments supporting up to 3.1 GHz with differential MUX input conditioning and 6 true outputs in a 36-pin WFQFN package. It delivers low-skew clock distribution for high-speed digital systems. Available from stock with worldwide shipping.
- Manufacturer
- Texas Instruments
- Package
- Quad Flat No-Lead
- Pin Count
- 36
- Lifecycle
- ACTIVE
- Datasheet
- LMK00306SQX/NOPB Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $5.1000(MOQ 27)
- Temp Range
- -40.0°C to 85.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- 3:7 clock distribution up to 3.1 GHz with low-skew outputs enables precise multi-load clock tree design in high-speed FPGAs, DSPs, and SerDes systems
- Differential MUX input conditioning selects between 3 differential or single-ended clock sources, simplifying redundant clock input switching without external glue logic
- 36-pin WFQFN exposed-pad package provides excellent thermal dissipation and minimal parasitic inductance for sub-picosecond jitter performance at GHz frequencies
Applications
The LMK00306SQX/NOPB is designed for clock tree distribution in high-speed digital backplanes, FPGA development boards, and multi-processor systems where a single 3.1 GHz reference must be fanned out to 6 or 7 synchronous loads with matched skew below 100 ps. Its differential multiplexer input allows seamless switching between a primary and redundant clock source in high-availability telecom line cards and data center switching equipment. The compact WFQFN footprint and low additive jitter specification also make it suitable for software-defined radio platforms and precision ADC/DAC clock distribution networks.
Specifications
| Pbfree Code | Yes |
| YTEOL | 15 |
| Family | 00306 |
| Input Conditioning | DIFFERENTIAL MUX |
| JESD-30 Code | S-XQCC-N36 |
| JESD-609 Code | e3 |
| Load Capacitance (CL) | 5pF |
| Logic IC Type | LOW SKEW CLOCK DRIVER |
| Number of Functions | 1 |
| Number of True Outputs | 6 |
| Output Characteristics | 3-STATE |
| Package Body Material | UNSPECIFIED |
| Package Equivalence Code | LCC36,.25SQ,20 |
| Package Shape | SQUARE |
| Package Style | CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE |
| Packing Method | TR |
| Peak Reflow Temperature (Cel) | 260 |
| Power Supply Current-Max (ICC) | 13.5mA |
| Prop. Delay@Nom-Sup | 2.7ns |
| Propagation Delay (tpd) | 2.7ns |
| Qualification Status | Not Qualified |
| Same Edge Skew-Max (tskwd) | 0.05ns |
| Supply Voltage-Max (Vsup) | 3.45V |
| Supply Voltage-Min (Vsup) | 3.15V |
| Supply Voltage-Nom (Vsup) | 3.3V |
| Surface Mount | YES |
| Technology | BICMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | Tin (Sn) |
| Terminal Form | NO LEAD |
| Terminal Pitch | 0.5mm |
| Terminal Position | QUAD |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| fmax-Min | 3100MHz |
| Package | Quad Flat No-Lead |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 3 |
| ECCN | EAR99 |
| HTS Code | 8542.39.00.90 |
Alternate & Equivalent Parts
No known alternates. Submit an RFQ and our team can suggest alternatives.
Frequently Asked Questions
How many output loads can LMK00306SQX/NOPB drive simultaneously and at what maximum frequency?
The LMK00306SQX/NOPB provides 6 true differential outputs capable of operating at frequencies up to 3.1 GHz, with a 5 pF rated load capacitance per output. In a typical FPGA clock network, all 6 outputs can be driven concurrently, each feeding a dedicated clock input pin with output-to-output skew held below 100 ps to maintain synchronous timing margins across the entire clock tree.
For a redundant clock design in a telecom line card, how does the 3-input MUX of LMK00306SQX/NOPB simplify failover switching?
The LMK00306SQX/NOPB accepts up to 3 differential clock inputs through its integrated MUX, allowing a system controller to switch between a primary OCXO reference, a secondary TCXO backup, and a recovered line clock via a 2-bit select signal—no external MUX IC required. The glitch-free or hitless switching option (depending on select signal timing) keeps output clocks within the SONET/SDH frequency mask during failover, avoiding a full PLL relock cycle in the downstream CDR devices.
For a PCB layout with 6 high-speed differential clock traces, how does the exposed-pad WFQFN-36 package of LMK00306SQX/NOPB help manage signal integrity?
The 36-pin WFQFN exposed-pad package places the die within 0.5 mm of the PCB ground plane, reducing bond-wire inductance to below 0.5 nH per pin and minimizing power-supply noise coupling from the die to the clock outputs. Routing all 6 differential output pairs symmetrically from the QFN periphery maintains matched trace lengths within ±10 mil, ensuring sub-100 ps output-to-output skew at 3.1 GHz without requiring equal-length serpentine routing on inner layers.
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About Texas Instruments
Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
| Qty. | Unit Price | Ext. Price |
|---|---|---|
| 27+ | $7.6389 | $206.25 |
| 34+ | $7.3842 | $251.06 |
| 46+ | $6.6203 | $304.53 |
| 2500+ | $5.1000 | $12750.00 |
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