LAN9252/ML Microchip Integrated Circuit (Quad Flat No-Lead) In Stock
Microchip LAN9252/ML is a 2-3 port EtherCAT slave controller with integrated Ethernet PHYs in a 64-pin QFN package, supporting SPI and I2C host interfaces. It delivers up to 12.5 MBps data transfer with 25 MHz clock and 16-bit address bus for industrial real-time networking. Available from authorized distributors worldwide with standard lead times.
- Manufacturer
- Microchip
- Package
- Quad Flat No-Lead
- Pin Count
- 64
- Lifecycle
- ACTIVE
- Datasheet
- LAN9252/ML Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $6.3700(MOQ 1)
- Temp Range
- ?°C to 70.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- Integrated dual-port EtherCAT slave controller with on-chip Ethernet PHYs eliminating external PHY components
- Flexible host interface supporting SPI, I2C, and 16-bit parallel bus at up to 12.5 MBps data transfer rate
- Compact 64-pin QFN package with boundary scan (JTAG) support simplifying board-level test and validation
Applications
The LAN9252/ML is designed for EtherCAT slave node implementations in industrial automation equipment such as servo drives, I/O modules, and motion controllers requiring real-time Ethernet communication at 100 Mbps. Its integrated dual-port PHY and daisy-chain topology support enable designers to add EtherCAT connectivity with minimal external components on space-constrained control PCBs. It is also used in robotics joint controllers and distributed sensor networks where deterministic sub-millisecond cycle times are essential.
Specifications
| Manufacturer Package Code | QFN-64 |
| Factory Lead Time | 5Weeks |
| YTEOL | 13 |
| Address Bus Width | 16 |
| Boundary Scan | YES |
| Bus Compatibility | I2C, SPI |
| Clock Frequency-Max | 25MHz |
| Communication Protocol | SYNC, BYTE; ETHERNET |
| Data Encoding/Decoding Method | NRZI |
| Data Transfer Rate-Max | 12.5MBps |
| External Data Bus Width | 16 |
| JESD-30 Code | S-XQCC-N64 |
| JESD-609 Code | e3 |
| Low Power Mode | YES |
| Number of Serial I/Os | 4 |
| Package Body Material | UNSPECIFIED |
| Package Equivalence Code | LCC64,.35SQ,20 |
| Package Shape | SQUARE |
| Package Style | CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE |
| Screening Level | TS 16949 |
| Supply Voltage-Max | 3.6V |
| Supply Voltage-Min | 3V |
| Supply Voltage-Nom | 3.3V |
| Surface Mount | YES |
| Technology | CMOS |
| Terminal Finish | Matte Tin (Sn) |
| Terminal Form | NO LEAD |
| Terminal Pitch | 0.5mm |
| Terminal Position | QUAD |
| uPs/uCs/Peripheral ICs Type | SERIAL IO/COMMUNICATION CONTROLLER, LAN |
| Package | Quad Flat No-Lead |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| ECCN | EAR99 |
| HTS Code | 8542.39.00.01 |
| Country of Origin | Taiwan, Thailand |
Alternate & Equivalent Parts
Compatible alternatives and drop-in replacements for LAN9252/ML:
Frequently Asked Questions
What host interface options and maximum data rate does LAN9252/ML support?
The LAN9252/ML supports SPI, I2C, and 16-bit parallel bus host interfaces with a maximum data transfer rate of 12.5 MBps and a clock frequency up to 25 MHz. This flexibility lets designers connect the EtherCAT slave controller to a wide range of microcontrollers and FPGAs without intermediate bridge chips.
How does integrating dual Ethernet PHYs in LAN9252/ML reduce industrial controller BOM cost?
By embedding two 100BASE-TX Ethernet PHYs on-chip, the LAN9252/ML eliminates the need for 2 separate external PHY ICs and their associated magnetics in daisy-chain EtherCAT topologies. This integration typically saves 5 to 10 discrete components per slave node, reducing PCB area and assembly cost in high-volume servo drive and I/O module production.
Which package does LAN9252/ML use and how does it support board-level testing?
The LAN9252/ML is housed in a 64-pin QFN (Quad Flat No-Lead) package with exposed thermal pad, suitable for automated pick-and-place on compact industrial PCBs. It also includes boundary scan (JTAG) capability, allowing IEEE 1149.1-compliant testing of interconnects without physical probe access to the fine-pitch QFN pads.
Related Guides
How to Choose a BAS70 Schottky Diode for Signal Clamping: Selection Guide
A practical BAS70KFILM and BAS70-family Schottky diode selection guide for signal clamping, RF detection, leakage, and topology choices.
Jul 4, 2026
AMC1202DWVR Design Guide for Isolated Current Sensing
Practical AMC1202DWVR design guide covering shunt sizing, isolation layout, input filtering, ADC scaling, and sourcing choices.
Jul 4, 2026
1206 100 uF MLCC Design Guide for Compact Bulk Decoupling
Design guidance for applying CL31A107MQHNNNE and related 1206 MLCCs in compact bulk decoupling networks.
Jul 3, 2026
0402 10 nF MLCC Design Guide for High-Speed Decoupling
Practical design guidance for using CL05B103KB5NNNC and related 0402 MLCCs in high-speed decoupling networks.
Jul 3, 2026
Why Buy from FindMyChip
About Microchip
Microchip is a leading electronic component manufacturer. FindMyChip sources Microchip ICs directly from authorized China distributors, offering competitive pricing and reliable stock.
| Qty. | Unit Price | Ext. Price |
|---|---|---|
| 1+ | $9.5300 | $9.53 |
| 17+ | $9.3982 | $159.77 |
| 25+ | $7.8400 | $196.00 |
| 100+ | $7.2700 | $727.00 |
| 1000+ | $6.7200 | $6720.00 |
| 5000+ | $6.3700 | $31850.00 |
In Stock · 24h Response · Worldwide Shipping
Response within 24 hours · Worldwide shipping
“The anti-counterfeit verification gave us confidence we'd never had with other China suppliers.”