ENC28J60T-I/ML Microchip Integrated Circuit (Quad Flat No-Lead) In Stock
ENC28J60T-I/ML is a standalone 10BASE-T Ethernet controller from Microchip with integrated MAC and PHY layers and 8KB on-chip SRAM buffer. Features SPI interface up to 10 MHz, full-duplex and half-duplex operation, and hardware CRC support in a 28-pin VQFN package. Available from $2.80 in stock with worldwide shipping.
- Manufacturer
- Microchip
- Package
- Quad Flat No-Lead
- Pin Count
- 28
- Lifecycle
- ACTIVE
- Datasheet
- ENC28J60T-I/ML Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $3.0600(MOQ 1)
- Temp Range
- -40.0°C to 85.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
What are the key features of ENC28J60T-I/ML?
- Integrated MAC and PHY in a single IC adds 10BASE-T Ethernet to any SPI-equipped microcontroller without external PHY or transformer driver
- 8KB on-chip SRAM receive/transmit buffer enables multi-packet buffering at 10 Mbps without requiring external memory
- SPI bus interface running up to 10 MHz allows connection to low-cost 8-bit MCUs including PIC, AVR, and STM8 families
What is ENC28J60T-I/ML used for?
ENC28J60T-I/ML is widely used to add Ethernet connectivity to embedded systems based on 8-bit or 16-bit microcontrollers that lack a built-in Ethernet peripheral, including Arduino Uno shields, PIC-based data loggers, and STM8-based building automation nodes. Its SPI-only interface simplifies integration into MCU designs where spare GPIO pins are limited, requiring only 4 wires — MOSI, MISO, SCK, and CS — to establish a full TCP/IP stack connection. The 28-pin VQFN package suits compact PCB layouts for smart meters, environmental sensors, and low-cost industrial Ethernet bridges.
What are the specifications of ENC28J60T-I/ML?
| Pbfree Code | Yes |
| Manufacturer Package Code | VQFN-28 |
| Factory Lead Time | 6Weeks |
| YTEOL | 8 |
| Boundary Scan | NO |
| Bus Compatibility | SPI |
| Clock Frequency-Max | 25MHz |
| Communication Protocol | ASYNC, BIT; ETHERNET |
| Data Transfer Rate-Max | 1.25MBps |
| JESD-30 Code | S-PQCC-N28 |
| JESD-609 Code | e3 |
| Low Power Mode | YES |
| Number of Serial I/Os | 1 |
| On Chip Data RAM Width | 8 |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | LCC28,.24SQ,25 |
| Package Shape | SQUARE |
| Package Style | CHIP CARRIER, VERY THIN PROFILE, HEAT SINK/SLUG |
| Peak Reflow Temperature (Cel) | 260 |
| Qualification Status | Not Qualified |
| RAM (words) | 8192 |
| Screening Level | TS 16949 |
| Supply Current-Max | 180mA |
| Supply Voltage-Max | 3.6V |
| Supply Voltage-Min | 3.1V |
| Supply Voltage-Nom | 3.3V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | Matte Tin (Sn) |
| Terminal Form | NO LEAD |
| Terminal Pitch | 0.65mm |
| Terminal Position | QUAD |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| uPs/uCs/Peripheral ICs Type | SERIAL IO/COMMUNICATION CONTROLLER, LAN |
| Package | Quad Flat No-Lead |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| ECCN | EAR99 |
| HTS Code | 8542.39.00.01 |
| Country of Origin | Philippines, Thailand |
Where can I find the ENC28J60T-I/ML datasheet?
ENC28J60T-I/ML Datasheet DownloadOfficial datasheet from Microchip
What are equivalent replacements for ENC28J60T-I/ML?
Compatible alternatives and drop-in replacements for ENC28J60T-I/ML:
Frequently Asked Questions
How much on-chip buffer memory does ENC28J60T-I/ML provide, and how does it affect packet handling in a TCP/IP stack?
ENC28J60T-I/ML integrates 8KB of on-chip SRAM that is partitioned between transmit and receive buffers under firmware control. A typical allocation of 6KB receive / 2KB transmit allows the device to hold 4 to 5 standard 1500-byte Ethernet frames before the host MCU services the interrupt, preventing dropped packets during brief CPU busy intervals. This 8KB buffer is sufficient for uIP or lwIP TCP/IP stacks running HTTP on an 8MHz PIC MCU without external memory.
What SPI clock speed does ENC28J60T-I/ML support, and which microcontroller families can interface with it directly?
ENC28J60T-I/ML supports an SPI clock frequency up to 10 MHz in Mode 0,0 and Mode 1,1 configurations. This is compatible with hardware SPI peripherals on PIC, AVR, STM8, STM32, and ESP8266 microcontrollers, all of which can reach at least 10 MHz SPI without clock divider constraints. At 10 MHz SPI clock with overhead, achievable throughput is approximately 1.25 MBps, enough to sustain 10BASE-T Ethernet at line rate for small embedded web server applications.
For a compact IoT sensor PCB, what footprint does the 28-pin VQFN package of ENC28J60T-I/ML occupy and what clearance rules apply?
The VQFN-28 package measures 6mm x 6mm with 0.65mm pin pitch and an exposed ground pad underneath, giving a PCB land pattern footprint of approximately 36mm². Reflow soldering requires a solder paste stencil with 0.12mm apertures for the 0.65mm pitch pads and a central thermal pad opening for the exposed die pad. This small footprint allows ENC28J60T-I/ML to be placed adjacent to the host MCU within a 20mm x 20mm module area, enabling Ethernet-connected sensor nodes smaller than a matchbook.
How does ENC28J60T-I/ML compare to W5500 for a resource-constrained MCU project that needs a simpler software stack?
ENC28J60T-I/ML provides MAC and PHY only, requiring the host MCU to run a full software TCP/IP stack such as uIP consuming about 4KB Flash. W5500 integrates a hardware TCP/IP stack in the chip, offloading all protocol processing from the MCU but requiring only 256KB host Flash for socket API calls. For MCUs with under 32KB Flash such as ATmega328P, W5500's hardware stack may not fit alongside application code, making ENC28J60T-I/ML with a minimal uIP 4KB stack the lower-memory option for simple UDP data-logging applications.
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| Qty. | Unit Price | Ext. Price |
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| 1+ | $11.0070 | $11.01 |
| 10+ | $7.3380 | $73.38 |
| 35+ | $6.7877 | $237.57 |
| 100+ | $3.7000 | $370.00 |
| 1000+ | $3.4000 | $3400.00 |
| 3200+ | $3.0600 | $9792.00 |
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