ENC28J60-I/SP Microchip Integrated Circuit (Dual-In-Line Packages) In Stock
Microchip ENC28J60-I/SP is a standalone 10Base-T Ethernet controller with an SPI interface operating at up to 25 MHz, housed in a 28-pin SPDIP package with 0.300-inch row spacing. It integrates a MAC, PHY, and 8 KB receive/transmit buffer. Available from authorized distributors with worldwide shipping.
- Manufacturer
- Microchip
- Package
- Dual-In-Line Packages
- Pin Count
- 28
- Lifecycle
- ACTIVE
- Datasheet
- ENC28J60-I/SP Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $2.1380(MOQ 1)
- Temp Range
- -40.0°C to 85.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
What are the key features of ENC28J60-I/SP?
- Standalone 10Base-T Ethernet MAC/PHY controller with 8 KB on-chip TX/RX buffer eliminates the need for an external MAC or PHY device
- SPI host interface up to 20 MHz with 1.25 Mbps effective data rate enables easy connection to virtually any microcontroller
- Integrated 10Base-T transceiver with on-chip full-duplex and half-duplex support covers standard wired Ethernet networking applications
- 28-pin SPDIP through-hole package simplifies prototyping and breadboard development for embedded Ethernet designs
What is ENC28J60-I/SP used for?
The ENC28J60-I/SP is widely used to add wired 10Base-T Ethernet connectivity to microcontrollers such as PIC, AVR, and ARM Cortex-M devices in IoT sensor nodes, home automation gateways, and industrial data loggers. Its SPI interface requires as few as 4 GPIO lines from the host MCU, making it suitable for resource-constrained 8-bit and 16-bit microcontroller projects that lack a built-in Ethernet MAC. The 28-pin SPDIP package and single 3.3 V supply simplify prototyping on breadboards and through-hole PCBs for proof-of-concept embedded networking systems.
What are the specifications of ENC28J60-I/SP?
| Pbfree Code | Yes |
| Manufacturer Package Code | SPDIP-28 |
| Factory Lead Time | 6Weeks |
| YTEOL | 10 |
| Boundary Scan | NO |
| Bus Compatibility | SPI |
| Clock Frequency-Max | 25MHz |
| Communication Protocol | SYNC, BYTE |
| Data Transfer Rate-Max | 1.25MBps |
| JESD-30 Code | R-PDIP-T28 |
| JESD-609 Code | e3 |
| Low Power Mode | YES |
| Number of Serial I/Os | 1 |
| On Chip Data RAM Width | 8 |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | DIP28,.6 |
| Package Shape | RECTANGULAR |
| Package Style | IN-LINE |
| Qualification Status | Not Qualified |
| RAM (words) | 8192 |
| Screening Level | TS 16949 |
| Supply Current-Max | 180mA |
| Supply Voltage-Max | 3.6V |
| Supply Voltage-Min | 3.1V |
| Supply Voltage-Nom | 3.3V |
| Surface Mount | NO |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | Matte Tin (Sn) |
| Terminal Form | THROUGH-HOLE |
| Terminal Pitch | 2.54mm |
| Terminal Position | DUAL |
| uPs/uCs/Peripheral ICs Type | SERIAL IO/COMMUNICATION CONTROLLER, LAN |
| Package | Dual-In-Line Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| ECCN | EAR99 |
| HTS Code | 8542.39.00.01 |
| Country of Origin | Thailand |
Where can I find the ENC28J60-I/SP datasheet?
ENC28J60-I/SP Datasheet DownloadOfficial datasheet from Microchip
What are equivalent replacements for ENC28J60-I/SP?
Compatible alternatives and drop-in replacements for ENC28J60-I/SP:
suggested
suggested
suggested
Frequently Asked Questions
What Ethernet standard and data transfer rate does the ENC28J60-I/SP support over SPI?
The ENC28J60-I/SP implements the 10Base-T Ethernet standard, providing 10 Mbps network bandwidth with an SPI clock frequency up to 20 MHz and an effective host data transfer rate of 1.25 Mbps. The SPI interface uses only 4 lines (SCK, MOSI, MISO, CS), enabling straightforward integration with virtually any 8-bit or 32-bit microcontroller that has an SPI peripheral.
How much on-chip memory does the ENC28J60-I/SP provide for Ethernet frame buffering?
The ENC28J60-I/SP contains 8 KB of on-chip SRAM that functions as a shared receive and transmit buffer. The host MCU can partition this memory at runtime — for example, allocating 6 KB for receive and 2 KB for transmit. At a typical Ethernet MTU of 1518 bytes per frame, 8 KB comfortably holds multiple simultaneous frames, reducing the risk of dropped packets in burst-traffic scenarios.
For an AVR-based IoT node running at 3.3 V, how does the ENC28J60-I/SP simplify the hardware design?
The ENC28J60-I/SP operates from a single 3.3 V supply and communicates over SPI, requiring no external MAC chip, PHY chip, or oscillator beyond a 25 MHz crystal. A designer connects VDD, GND, the 4-wire SPI bus, and a reset line to the AVR, then adds a standard RJ-45 jack with integrated magnetics to complete a functional 10Base-T Ethernet interface in fewer than 10 passive components.
When is the ENC28J60-I/SP a suitable alternative to a more integrated Ethernet SoC like the W5500?
The ENC28J60-I/SP is preferable when the host MCU has ample processing resources to run a software TCP/IP stack such as lwIP or uIP, and the target application requires maximum flexibility in protocol handling or custom packet processing at Layer 2. In contrast, the W5500 offloads TCP/IP to hardware but limits customization. For 8-bit AVR or PIC designs running at 8 MHz to 20 MHz with at least 8 KB of Flash available for a stack, the ENC28J60 typically provides a lower total BOM cost.
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More from Microchip
| Qty. | Unit Price | Ext. Price |
|---|---|---|
| 1+ | $3.6055 | $3.61 |
| 3+ | $2.1380 | $6.41 |
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