CD74HCT75EE4 Texas Instruments Integrated Circuit (Dual-In-Line Packages) In Stock
The CD74HCT75EE4 is a dual D-latch high-speed CMOS logic IC from Texas Instruments in the HCT family, featuring complementary outputs and 50pF load capacitance rating in a 16-pin DIP package. It provides 4mA output sink current and full TTL-compatible input thresholds for interfacing with 5V logic systems. Available from stock worldwide in a through-hole DIP package.
- Manufacturer
- Texas Instruments
- Package
- Dual-In-Line Packages
- Pin Count
- 16
- Lifecycle
- OBSOLETE
- Datasheet
- CD74HCT75EE4 Datasheet PDF
- Category
- Integrated Circuit
- Temp Range
- -55.0°C to 125.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
What are the key features of CD74HCT75EE4?
- Dual D-latch configuration with complementary Q and Q-bar outputs simplifies bi-phase logic and bus interface designs
- HCT family TTL-compatible input thresholds enable direct interfacing between CMOS and 5V TTL logic families
- High-speed CMOS technology combines low power consumption with fast propagation delays for modern digital systems
- 16-pin DIP package (JESD-30 R-PDIP-T16) suits prototyping, repair, and through-hole industrial applications
What is CD74HCT75EE4 used for?
The CD74HCT75EE4 is used in digital systems requiring transparent latching of data signals, such as address latches in microprocessor bus interfaces, data buffering in industrial PLCs, and signal synchronization in test and measurement equipment. Its TTL-compatible HCT inputs make it ideal for mixed 5V TTL/CMOS logic designs where older bus standards such as ISA or parallel I/O must interface with CMOS controllers. It is also used in educational and prototyping environments where through-hole DIP packages facilitate easy breadboard assembly and circuit debugging.
What are the specifications of CD74HCT75EE4?
| YTEOL | 0 |
| Family | HCT |
| JESD-30 Code | R-PDIP-T16 |
| JESD-609 Code | e4 |
| Load Capacitance (CL) | 50pF |
| Logic IC Type | D LATCH |
| Max I(ol) | 0.004A |
| Number of Bits | 2 |
| Number of Functions | 2 |
| Output Polarity | COMPLEMENTARY |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | DIP16,.3 |
| Package Shape | RECTANGULAR |
| Package Style | IN-LINE |
| Packing Method | TUBE |
| Power Supply Current-Max (ICC) | 0.08mA |
| Prop. Delay@Nom-Sup | 35ns |
| Propagation Delay (tpd) | 42ns |
| Qualification Status | Not Qualified |
| Schmitt Trigger | NO |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | NO |
| Technology | CMOS |
| Temperature Grade | MILITARY |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Terminal Form | THROUGH-HOLE |
| Terminal Pitch | 2.54mm |
| Terminal Position | DUAL |
| Trigger Type | HIGH LEVEL |
| Package | Dual-In-Line Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| HTS Code | 8542.39.00.60 |
| Country of Origin | Malaysia, Mexico |
Where can I find the CD74HCT75EE4 datasheet?
CD74HCT75EE4 Datasheet DownloadOfficial datasheet from Texas Instruments
What are equivalent replacements for CD74HCT75EE4?
No known alternates. Submit an RFQ and our team can suggest alternatives.
Frequently Asked Questions
What type of logic device is the CD74HCT75EE4 and what is its function?
The CD74HCT75EE4 is a dual D-type transparent latch in the HCT high-speed CMOS family. It contains two independent D-latches, each with complementary Q and Q-bar outputs, allowing data to pass through when the enable input is high and latching the last input state when the enable goes low, making it useful for data bus management and address decoding.
Is the CD74HCT75EE4 compatible with TTL logic levels?
Yes, the CD74HCT75EE4 belongs to the HCT family, which features TTL-compatible input switching thresholds (approximately 1.2V). This allows it to interface directly with 5V TTL logic outputs without level-shifting, making it ideal for mixed-logic systems where older TTL devices need to drive CMOS inputs.
What package does the CD74HCT75EE4 come in and what are its pin characteristics?
The CD74HCT75EE4 is housed in a 16-pin DIP (Dual-In-Line Package) through-hole package (JESD-30 code R-PDIP-T16) with 2.54mm pin pitch, providing easy insertion into breadboards and through-hole PCBs. It has a maximum output sink current of 4mA and is rated for 50pF load capacitance per output.
What are typical applications for the CD74HCT75EE4?
The CD74HCT75EE4 is commonly used as an address or data latch in 8-bit microprocessor systems, in bus transceivers and multiplexers, in industrial control panels for signal buffering, and in test equipment for capturing and holding logic states. Its complementary outputs also make it suitable for generating non-overlapping clock or control signals.
What is the difference between the HCT and HC CMOS logic families?
The HCT family, like the CD74HCT75EE4, operates from a 5V supply and has TTL-compatible input thresholds (VIH approximately 2V, VIL approximately 0.8V), allowing direct interfacing with TTL logic. The HC family has CMOS-level input thresholds (approximately 50% of VCC) and is not directly TTL-compatible without additional level shifting, making HCT preferred for 5V mixed-logic legacy system designs.
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About Texas Instruments
Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
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