CD74HC73M Texas Instruments Integrated Circuit (Small Outline Packages) In Stock
CD74HC73M is a dual negative-edge-triggered J-K flip-flop IC with reset in a 14-pin SOIC package. Features 20 MHz max frequency, 50 pF load capacitance, and master-slave operation. From $0.45, in stock, worldwide shipping.
- Manufacturer
- Texas Instruments
- Package
- Small Outline Packages
- Pin Count
- 14
- Lifecycle
- OBSOLETE
- Datasheet
- CD74HC73M Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $0.3114(MOQ 1)
- Temp Range
- -55.0°C to 125.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- Dual J-K flip-flop with negative-edge triggering and master-slave operation for reliable state capture in high-speed digital circuits
- 20 MHz maximum toggle frequency with 6 mA output sink current, suitable for medium-speed sequential logic applications
- HC-series CMOS logic with 50 pF load capacitance rating and wide 2 V to 6 V supply range for flexible system integration
Applications
CD74HC73M is used in sequential digital logic circuits requiring dual independent J-K flip-flops with asynchronous reset capability. It suits applications such as frequency dividers, shift registers, state machines, and clock synchronization circuits in embedded control and industrial electronics. The 14-pin SOIC package facilitates easy PCB integration in compact logic designs operating up to 20 MHz.
Specifications
| YTEOL | 0 |
| Additional Feature | MASTER SLAVE OPERATION |
| Family | HC |
| JESD-30 Code | R-PDSO-G14 |
| JESD-609 Code | e4 |
| Load Capacitance (CL) | 50pF |
| Logic IC Type | J-K FLIP-FLOP |
| Max Frequency@Nom-Sup | 20000000Hz |
| Max I(ol) | 0.006A |
| Number of Bits | 2 |
| Number of Functions | 2 |
| Output Polarity | COMPLEMENTARY |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | SOP14,.25 |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE |
| Packing Method | TUBE |
| Peak Reflow Temperature (Cel) | 260 |
| Power Supply Current-Max (ICC) | 0.04mA |
| Prop. Delay@Nom-Sup | 40ns |
| Propagation Delay (tpd) | 240ns |
| Qualification Status | Not Qualified |
| Schmitt Trigger | NO |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | MILITARY |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Terminal Form | GULL WING |
| Terminal Pitch | 1.27mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Trigger Type | NEGATIVE EDGE |
| fmax-Min | 24MHz |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| ECCN | EAR99 |
| HTS Code | 8542.39.00.01 |
| Country of Origin | Malaysia |
Alternate & Equivalent Parts
Compatible alternatives and drop-in replacements for CD74HC73M:
J-K Flip-Flop, HC/UH Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO14
Frequently Asked Questions
What is the maximum operating frequency of CD74HC73M and what load capacitance is rated?
CD74HC73M operates at a maximum frequency of 20 MHz with a rated load capacitance of 50 pF, making it suitable for medium-speed synchronous counter, divider, and state machine designs in digital logic systems.
How does the master-slave operation in CD74HC73M benefit edge-triggered flip-flop designs?
Master-slave operation in CD74HC73M ensures that the output changes only on the falling clock edge, preventing race conditions and glitches in sequential logic. With 6 mA output sink current, it reliably drives capacitive loads in bus-connected digital systems.
Which package does CD74HC73M come in and how many flip-flop channels does it provide?
CD74HC73M comes in a 14-pin SOIC small outline package and provides 2 independent J-K flip-flop channels, each with its own clock, J, K, and active-low reset inputs for flexible sequential logic configurations.
When would CD74HC73M be chosen over a D-type flip-flop for a frequency divider design?
CD74HC73M's J-K topology allows direct toggle-mode division without external feedback by tying J and K high, whereas a D-type flip-flop requires Q-to-D feedback wiring. At 20 MHz max frequency and 50 pF load, it is well-suited for divide-by-2 counter stages in crystal oscillator circuits.
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About Texas Instruments
Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
| Qty. | Unit Price | Ext. Price |
|---|---|---|
| 1+ | $0.9800 | $0.98 |
| 10+ | $0.7040 | $7.04 |
| 50+ | $0.5934 | $29.67 |
| 560+ | $0.3594 | $201.26 |
| 720+ | $0.3474 | $250.13 |
| 965+ | $0.3114 | $300.50 |
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