CD74HC137PW Texas Instruments Integrated Circuit (Small Outline Packages) In Stock

Texas Instruments CD74HC137PW is a high-speed CMOS 3-line to 8-line decoder/demultiplexer with inverting outputs, address latches, and 3 enable inputs in a 16-pin TSSOP package. Operates from 2 V to 6 V supply with 50 pF load drive capability for flexible interfacing. Available from stock worldwide with global shipping.

OBSOLETEIntegrated CircuitVerified Jun 2026
Package / Visual Reference
CD74HC137PWSmall Outline Packages
Quick Facts
Manufacturer
Texas Instruments
Package
Small Outline Packages
Pin Count
16
Lifecycle
OBSOLETE
Category
Integrated Circuit
Price
From $0.5200(MOQ 286)
Temp Range
-55.0°C to 125.0°C
RoHS
Compliant
Lead Time
3–7 business days
Shipping
DHL Express · Worldwide

What are the key features of CD74HC137PW?

  • 3-line to 8-line inverting decoder with on-chip address latches for glitch-free output switching in bus-oriented systems
  • Wide 2 V to 6 V supply range compatible with 3.3 V and 5 V logic families without level-shifting
  • Three independent enable inputs allow cascading multiple CD74HC137PW devices to expand from 8 to 64 or more decoded outputs

What is CD74HC137PW used for?

The CD74HC137PW is used in address decoding for microcontroller and FPGA memory maps, enabling selection among up to 8 peripheral chips from 3 address lines. It is also applied in data routing and demultiplexing for industrial control panels, where latched address inputs hold the selected output stable during bus transitions. The TSSOP-16 package and 2 V to 6 V operating range make it a compact choice for embedded systems and communication equipment requiring simple address-based chip-select generation.

What are the specifications of CD74HC137PW?

YTEOL0
Additional FeatureADDRESS LATCHES; 3 ENABLE INPUTS
FamilyHC/UH
Input ConditioningLATCHED
JESD-30 CodeR-PDSO-G16
JESD-609 Codee4
Load Capacitance (CL)50pF
Logic IC Type3-LINE TO 8-LINE DECODER
Max I(ol)0.0052A
Number of Bits8
Number of Functions1
Output PolarityINVERTED
Package Body MaterialPLASTIC/EPOXY
Package Equivalence CodeTSSOP16,.25
Package ShapeRECTANGULAR
Package StyleSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Packing MethodTUBE
Peak Reflow Temperature (Cel)260
Power Supply Current-Max (ICC)0.16mA
Prop. Delay@Nom-Sup36ns
Propagation Delay (tpd)270ns
Qualification StatusNot Qualified
Supply Voltage-Max (Vsup)6V
Supply Voltage-Min (Vsup)2V
Supply Voltage-Nom (Vsup)4.5V
Surface MountYES
TechnologyCMOS
Temperature GradeMILITARY
Terminal FinishNickel/Palladium/Gold (Ni/Pd/Au)
Terminal FormGULL WING
Terminal Pitch0.65mm
Terminal PositionDUAL
Time@Peak Reflow Temperature-Max (s)30
PackageSmall Outline Packages

Compliance & Regulatory

RoHS StatusCompliant
Lead-FreeYes (Pb-Free)
Moisture Sensitivity LevelMSL 1
ECCNEAR99
HTS Code8542.39.00.60
Country of OriginMalaysia

Where can I find the CD74HC137PW datasheet?

CD74HC137PW Datasheet Download

Official datasheet from Texas Instruments

What are equivalent replacements for CD74HC137PW?

No known alternates. Submit an RFQ and our team can suggest alternatives.

Frequently Asked Questions

What supply voltage range does the CD74HC137PW support, and is it compatible with 3.3 V systems?

The CD74HC137PW operates from 2 V to 6 V, making it fully compatible with both 3.3 V and 5 V logic systems without external level translators. At 3.3 V it meets standard HC-family input thresholds, allowing direct connection to FPGA and microcontroller GPIO running at 3.3 V rails.

How does the address latch feature of CD74HC137PW prevent output glitches in address-decode circuits?

The on-chip address latches capture the 3-bit address when the latch enable input is asserted, holding the selected output stable even if address lines change afterward. This prevents false triggering of peripheral chips during bus turnaround cycles and is especially important in 8-bit microprocessor systems with multiplexed address and data buses.

How many outputs can be expanded by cascading multiple CD74HC137PW decoders with its 3 enable inputs?

Each CD74HC137PW decodes 3 address inputs to 8 outputs, and using the 3 enable inputs to cascade devices scales the decoded outputs to 16, 32, or 64 lines. For example, 2 devices with one higher-order enable bit select between them provides 16 unique decoded outputs from 4 address lines.

For a compact PCB design, what board space does the 16-pin TSSOP package of CD74HC137PW require?

The TSSOP-16 package has a 5 mm body length, 4.4 mm width, and 0.65 mm pin pitch, occupying roughly 22 mm² of PCB area. This is significantly smaller than a standard SOIC-16 footprint, making CD74HC137PW a good choice when routing address decode logic in space-constrained board layouts alongside dense connector banks.

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About Texas Instruments

Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.

AvailabilityIn Stock
Reference Price (USD)
From $0.5200
Buy from 1pc · Factory-direct pricing
Qty.Unit PriceExt. Price
286+$1.0500$300.30
630+$0.8079$508.98
1000+$0.6961$696.10
10000+$0.6206$6206.00
100000+$0.5200$52000.00
pcs
Unit price: $1.0500 · Total: $300.30

In Stock · 24h Response · Worldwide Shipping

Lead Time3-7 business days
MOQFrom 1 piece
ShippingDHL / FedEx / UPS
OriginChina (Authorized)

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