CD74ACT112MG4 Texas Instruments Integrated Circuit (Small Outline Packages) In Stock
Texas Instruments CD74ACT112MG4 is a dual negative-edge-triggered J-K flip-flop in ACT logic family with 100 MHz max frequency and 16-pin SOIC package. Available from stock with worldwide shipping.
- Manufacturer
- Texas Instruments
- Package
- Small Outline Packages
- Pin Count
- 16
- Lifecycle
- OBSOLETE
- Datasheet
- CD74ACT112MG4 Datasheet PDF
- Category
- Integrated Circuit
- Temp Range
- -55.0°C to 125.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- Dual negative-edge-triggered J-K flip-flop design enables versatile sequential logic functions including toggle, set, reset, and hold states
- 100 MHz maximum operating frequency supports high-speed digital state machine and counter designs with ACT-family CMOS efficiency
- 24 mA maximum low-level output current provides robust drive capability for bus and clock distribution loads
- 16-pin SOIC package with lead-free RoHS-compliant (JESD-609 e4) construction for modern surface-mount assembly
Applications
The CD74ACT112MG4 is used in digital logic designs requiring dual J-K flip-flop functionality for frequency division, state machine construction, synchronization, and data latching at clock rates up to 100 MHz. Its ACT-family logic combines CMOS low power with TTL-input compatibility, making it suitable for interfacing between 5V TTL and CMOS logic sections in industrial control boards and communication equipment. The 16-pin SOIC format facilitates integration into compact clock generation and sequential logic circuits.
Specifications
| Pbfree Code | Yes |
| YTEOL | 0 |
| Family | ACT |
| JESD-30 Code | R-PDSO-G16 |
| JESD-609 Code | e4 |
| Load Capacitance (CL) | 50pF |
| Logic IC Type | J-K FLIP-FLOP |
| Max Frequency@Nom-Sup | 100000000Hz |
| Max I(ol) | 0.024A |
| Number of Bits | 2 |
| Number of Functions | 2 |
| Output Polarity | COMPLEMENTARY |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | SOP16,.25 |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE |
| Packing Method | TUBE |
| Peak Reflow Temperature (Cel) | 260 |
| Power Supply Current-Max (ICC) | 0.08mA |
| Prop. Delay@Nom-Sup | 11.1ns |
| Propagation Delay (tpd) | 10.3ns |
| Qualification Status | Not Qualified |
| Schmitt Trigger | NO |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | MILITARY |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Terminal Form | GULL WING |
| Terminal Pitch | 1.27mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Trigger Type | NEGATIVE EDGE |
| fmax-Min | 100MHz |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| HTS Code | 8542.39.00.60 |
| Country of Origin | Mexico |
Alternate & Equivalent Parts
Compatible alternatives and drop-in replacements for CD74ACT112MG4:
J-K Flip-Flop, ACT Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16
Frequently Asked Questions
What type of logic device is the CD74ACT112MG4?
The CD74ACT112MG4 is a dual negative-edge-triggered J-K flip-flop. It provides two independent J-K flip-flop cells, each capable of toggle, set, reset, and hold operations triggered on the falling edge of the clock signal, making it a fundamental building block for counters, dividers, and state machines.
What is the maximum operating frequency of the CD74ACT112MG4?
The CD74ACT112MG4 supports a maximum operating frequency of 100 MHz at nominal supply voltage with a 50 pF load capacitance. This high-speed performance makes it suitable for use in fast clock division circuits, digital frequency synthesizers, and synchronous state machines in communications and computing applications.
What logic family does the CD74ACT112MG4 belong to and what is its supply voltage?
The CD74ACT112MG4 belongs to the ACT (Advanced CMOS TTL-compatible) logic family, which combines CMOS power efficiency with TTL-level input thresholds. It operates at 5V, enabling seamless interfacing with both TTL and CMOS logic components in mixed-technology digital system designs.
What package does the CD74ACT112MG4 use?
The CD74ACT112MG4 comes in a 16-pin Small Outline IC (SOIC) package, identified by JESD-30 code R-PDSO-G16. This surface-mount package is compatible with standard automated PCB assembly processes and is widely used in industrial, commercial, and communications digital logic designs.
Is the CD74ACT112MG4 RoHS compliant?
Yes, the CD74ACT112MG4 is lead-free and RoHS compliant, as indicated by its Pb-free code and JESD-609 code e4. This ensures it meets environmental standards required in regulated markets such as the EU, making it suitable for use in consumer electronics, industrial equipment, and telecommunications hardware.
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Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
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