CD74ACT109M96E4 Texas Instruments Integrated Circuit (Small Outline Packages) In Stock
The CD74ACT109M96E4 is a dual positive-edge-triggered J-K flip-flop IC from Texas Instruments with set and reset inputs, operating at up to 100 MHz in a 16-pin SOIC package. It belongs to the high-speed ACT logic family with 24 mA output drive and 50 pF load capacitance rating. Available RoHS-compliant in tape-and-reel format with worldwide distribution.
- Manufacturer
- Texas Instruments
- Package
- Small Outline Packages
- Pin Count
- 16
- Lifecycle
- OBSOLETE
- Datasheet
- CD74ACT109M96E4 Datasheet PDF
- Category
- Integrated Circuit
- Temp Range
- -55.0°C to 125.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- Dual positive-edge-triggered J-K flip-flops with independent set and reset for flexible synchronous and asynchronous control in digital logic designs
- High-speed ACT logic family operation up to 100 MHz enables use in fast clock domains and high-frequency sequential circuits
- 24 mA maximum output current (I_OL) provides strong drive capability for bus loading and cascaded logic applications
- 16-pin SOIC (R-PDSO-G16) RoHS-compliant e4 package in tape-and-reel format for automated high-volume SMT assembly
Applications
The CD74ACT109M96E4 is used in digital logic systems for frequency division, state machine implementation, shift registers, and synchronous data storage where two independent J-K flip-flops with set/reset are required. Its 100 MHz maximum frequency makes it suitable for high-speed clocking applications in CPLDs, FPGAs, and glue logic designs. The ACT family voltage compatibility with both TTL and CMOS levels facilitates mixed-logic interfacing in industrial and computing systems.
Specifications
| YTEOL | 0 |
| Family | ACT |
| JESD-30 Code | R-PDSO-G16 |
| JESD-609 Code | e4 |
| Load Capacitance (CL) | 50pF |
| Logic IC Type | J-KBAR FLIP-FLOP |
| Max Frequency@Nom-Sup | 100000000Hz |
| Max I(ol) | 0.024A |
| Number of Bits | 2 |
| Number of Functions | 2 |
| Output Polarity | COMPLEMENTARY |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | SOP16,.25 |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE |
| Packing Method | TR |
| Peak Reflow Temperature (Cel) | 260 |
| Power Supply Current-Max (ICC) | 0.08mA |
| Prop. Delay@Nom-Sup | 11.1ns |
| Propagation Delay (tpd) | 10.3ns |
| Qualification Status | Not Qualified |
| Schmitt Trigger | NO |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | MILITARY |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Terminal Form | GULL WING |
| Terminal Pitch | 1.27mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Trigger Type | POSITIVE EDGE |
| fmax-Min | 100MHz |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| HTS Code | 8542.39.00.60 |
| Country of Origin | Mexico |
Alternate & Equivalent Parts
Compatible alternatives and drop-in replacements for CD74ACT109M96E4:
J-Kbar Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16
Frequently Asked Questions
What type of flip-flop is the CD74ACT109M96E4?
The CD74ACT109M96E4 contains two independent positive-edge-triggered J-K flip-flops with separate set and reset (clear) inputs. J-K flip-flops are versatile sequential logic elements that can be configured as D flip-flops, toggle flip-flops, or latches. The asynchronous set and reset inputs allow the outputs to be forced to a known state independently of the clock, which is useful for initialization and reset sequences in digital systems.
What is the maximum clock frequency supported by the CD74ACT109M96E4?
The CD74ACT109M96E4 supports a maximum operating frequency of 100 MHz (100,000,000 Hz) at nominal supply voltage. This makes it suitable for high-speed digital logic, frequency divider circuits, and synchronous state machines in applications requiring fast clock edges. The ACT logic family uses advanced CMOS technology to achieve TTL-compatible input thresholds with high-speed switching performance.
What is the difference between ACT and HC logic families, and why choose ACT?
ACT (Advanced CMOS TTL-compatible) logic accepts TTL-level input thresholds (VIH = 2 V, VIL = 0.8 V), making it directly compatible with TTL outputs and 5 V CMOS systems. HC (High-speed CMOS) logic uses CMOS input thresholds (VIH = 3.5 V at 5 V supply) and is not directly TTL-compatible. ACT is preferred when interfacing with TTL-output devices or in mixed TTL/CMOS signal environments common in legacy and industrial digital designs.
What package and output drive capability does the CD74ACT109M96E4 have?
The CD74ACT109M96E4 is packaged in a 16-pin SOIC (R-PDSO-G16) with a tape-and-reel (M96) format for automated assembly. It provides a maximum low-level output current (I_OL) of 24 mA and is rated for a 50 pF load capacitance. The JESD-609 e4 code confirms lead-free, RoHS-compliant construction. The 24 mA drive strength is sufficient for driving multiple gate inputs or light bus loads without external buffers.
What are typical applications for the CD74ACT109M96E4?
Typical applications include frequency dividers, synchronous counters, shift register stages, state machine storage elements, and digital control circuits requiring J-K flip-flop behavior with preset and clear functionality. The dual-flip-flop configuration is commonly used in glue logic designs for CPUs, FPGAs, and embedded systems, as well as in communication interface circuits and timing generation modules.
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About Texas Instruments
Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
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