CD74AC652M96 Texas Instruments Integrated Circuit (Small Outline Packages) In Stock

The CD74AC652M96 is an 8-bit bidirectional registered bus transceiver from Texas Instruments in the AC CMOS logic family with independent control inputs and a select input for multiplexed registered or real-time data transmission. It operates with 50 pF load capacitance in a 24-pin SOIC package. Available in tape-and-reel with worldwide in-stock shipping.

ACTIVEIntegrated CircuitVerified Jun 2026
Package / Visual Reference
CD74AC652M96Small Outline Packages
Quick Facts
Manufacturer
Texas Instruments
Package
Small Outline Packages
Pin Count
24
Lifecycle
ACTIVE
Category
Integrated Circuit
Price
From $1.2800(MOQ 150)
Temp Range
-55.0°C to 125.0°C
RoHS
Compliant
Lead Time
3–7 business days
Shipping
DHL Express · Worldwide

What are the key features of CD74AC652M96?

  • 8-bit bidirectional registered bus transceiver with select input for multiplexed real-time and registered data paths in a single device
  • Independent output-enable and direction controls on each port for flexible bus arbitration without external gating logic
  • AC CMOS logic family with 50 pF load capacity in a 24-pin SOIC package enabling reliable bus driving at 3.3 V to 5 V

What is CD74AC652M96 used for?

The CD74AC652M96 is designed for high-speed bidirectional data bus isolation and buffering in microprocessor and DSP systems where registered and real-time transmission modes must both be supported from a single IC. Its select input allows designers to switch between latched and transparent operation without external multiplexers, reducing logic complexity in memory interface and peripheral bus designs. The AC CMOS family's low propagation delay and 50 pF load rating make it suitable for address and data bus buffering in embedded systems, FPGA I/O expansion, and backplane interface circuits.

What are the specifications of CD74AC652M96?

Pbfree CodeYes
YTEOL15
Additional FeatureSELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED/REAL TIME
Control TypeINDEPENDENT CONTROL
Count DirectionBIDIRECTIONAL
FamilyAC
JESD-30 CodeR-PDSO-G24
JESD-609 Codee4
Load Capacitance (CL)50pF
Logic IC TypeREGISTERED BUS TRANSCEIVER
Max I(ol)0.024A
Number of Bits8
Number of Functions8
Number of Ports2
Output Characteristics3-STATE
Output PolarityTRUE
Package Body MaterialPLASTIC/EPOXY
Package Equivalence CodeSOP24,.4
Package ShapeRECTANGULAR
Package StyleSMALL OUTLINE
Packing MethodTR
Peak Reflow Temperature (Cel)260
Power Supply Current-Max (ICC)0.16mA
Prop. Delay@Nom-Sup15.4ns
Propagation Delay (tpd)138ns
Qualification StatusNot Qualified
Schmitt TriggerNO
Supply Voltage-Max (Vsup)5.5V
Supply Voltage-Min (Vsup)1.5V
Supply Voltage-Nom (Vsup)5V
Surface MountYES
TechnologyCMOS
Temperature GradeMILITARY
Terminal FinishNickel/Palladium/Gold (Ni/Pd/Au)
Terminal FormGULL WING
Terminal Pitch1.27mm
Terminal PositionDUAL
Time@Peak Reflow Temperature-Max (s)30
Trigger TypePOSITIVE EDGE
PackageSmall Outline Packages

Compliance & Regulatory

RoHS StatusCompliant
Lead-FreeYes (Pb-Free)
Moisture Sensitivity LevelMSL 1
ECCNEAR99
HTS Code8542.39.00.90
Country of OriginTaiwan

Where can I find the CD74AC652M96 datasheet?

CD74AC652M96 Datasheet Download

Official datasheet from Texas Instruments

What are equivalent replacements for CD74AC652M96?

No known alternates. Submit an RFQ and our team can suggest alternatives.

Frequently Asked Questions

What is the difference between the registered and real-time transmission modes of CD74AC652M96 and when should each be used?

In real-time (transparent) mode, data flows directly from the input port to the output port with only propagation delay (typically under 10 ns at 5 V, 50 pF load) — suitable for asynchronous bus connections where no latching is required. In registered mode, an internal 8-bit latch captures data on the clock edge, holding the output stable while the input bus changes — ideal for synchronous processor-to-memory interfaces where address or data must be held valid for multiple clock cycles. The CD74AC652M96's select input switches between these modes at runtime, letting a single device serve both purposes in a multiplexed bus architecture.

How does CD74AC652M96 simplify bus arbitration in a dual-processor shared-memory board design?

In a dual-processor shared-memory design, the CD74AC652M96's independent direction and output-enable controls on each port allow each processor to drive the 8-bit bus only when granted bus mastership, while the other processor's port is tristated. This eliminates the need for 4 to 8 separate discrete bus switches or buffer ICs, consolidating 8-bit bidirectional control and latching into a single 24-pin device and reducing propagation delay in the arbitrated bus path compared to cascaded discrete components.

Can CD74AC652M96 directly interface 3.3 V FPGA I/O with a 5 V peripheral bus without additional level shifters?

The CD74AC652M96 in the AC CMOS family is a 5 V-powered device; its input thresholds require approximately 3.5 V high-level input when powered at 5 V, which 3.3 V FPGA outputs (driving 3.0 V to 3.3 V) may not reliably meet. A level shifter or a variant powered at 3.3 V is required for clean 3.3 V to 5 V translation. However, when both the FPGA and peripheral bus operate at the same 3.3 V or 5 V level, CD74AC652M96 serves as a direct interface requiring no additional translation components across its 8 bidirectional data lines.

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About Texas Instruments

Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.

AvailabilityIn Stock
Reference Price (USD)
From $1.2800
Buy from 1pc · Factory-direct pricing
Qty.Unit PriceExt. Price
150+$2.0000$300.00
500+$1.4400$720.00
1000+$1.3600$1360.00
10000+$1.2800$12800.00
pcs
Unit price: $2.0000 · Total: $300.00

In Stock · 24h Response · Worldwide Shipping

Lead Time3-7 business days
MOQFrom 1 piece
ShippingDHL / FedEx / UPS
OriginChina (Authorized)

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