CD74AC573M96E4 Texas Instruments Integrated Circuit (Small Outline Packages) In Stock

The CD74AC573M96E4 is an 8-bit octal transparent D-latch with 3-state outputs from Texas Instruments' AC logic family, supporting supply voltages from 2 V to 6 V. It features a 50 pF load capacitance rating and non-inverting true outputs for direct bus interfacing. Available in a 20-pin SOIC package with RoHS-compliant e4 lead-free termination.

OBSOLETEIntegrated CircuitVerified May 2026
Package / Visual Reference
CD74AC573M96E4Small Outline Packages
Quick Facts
Manufacturer
Texas Instruments
Package
Small Outline Packages
Pin Count
20
Lifecycle
OBSOLETE
Category
Integrated Circuit
Temp Range
-55.0°C to 125.0°C
RoHS
Compliant
Lead Time
3–7 business days
Shipping
DHL Express · Worldwide

Key Features

  • Octal 8-bit transparent latch with 3-state outputs for high-density bus interface in 2 V to 6 V systems
  • AC CMOS logic family delivering fast propagation delays with low static power consumption across the full 2 V to 6 V supply range
  • RoHS-compliant JESD-609 e4 lead-free 20-pin SOIC-20 package rated to 50 pF load capacitance for reliable high-speed bus driving

Applications

The CD74AC573M96E4 is used as an address or data bus latch between microprocessors and memory or peripheral devices in embedded systems operating from 2 V to 6 V supply rails. Its transparent latch mode captures 8 bits of data when the latch-enable pin is asserted, then holds the captured state when LE goes LOW, making it ideal for demultiplexing multiplexed address/data buses. The 3-state outputs allow multiple latch devices to share the same 8-bit bus without signal contention in board-level memory expansion and I/O expansion designs.

Specifications

YTEOL0
FamilyAC
JESD-30 CodeR-PDSO-G20
JESD-609 Codee4
Load Capacitance (CL)50pF
Logic IC TypeBUS DRIVER
Number of Bits8
Number of Functions1
Number of Ports2
Output PolarityTRUE
Package Body MaterialPLASTIC/EPOXY
Package Equivalence CodeSOP20,.4
Package ShapeRECTANGULAR
Package StyleSMALL OUTLINE
Packing MethodTR
Peak Reflow Temperature (Cel)260
Prop. Delay@Nom-Sup11.9ns
Propagation Delay (tpd)150ns
Qualification StatusNot Qualified
Supply Voltage-Max (Vsup)5.5V
Supply Voltage-Min (Vsup)1.5V
Supply Voltage-Nom (Vsup)5V
Surface MountYES
TechnologyCMOS
Temperature GradeMILITARY
Terminal FinishNICKEL PALLADIUM GOLD
Terminal FormGULL WING
Terminal Pitch1.27mm
Terminal PositionDUAL
Time@Peak Reflow Temperature-Max (s)30
PackageSmall Outline Packages

Compliance & Regulatory

RoHS StatusCompliant
Lead-FreeYes (Pb-Free)
Moisture Sensitivity LevelMSL 1
HTS Code8542.39.00.60

Datasheet

CD74AC573M96E4 Datasheet Download

Official datasheet from Texas Instruments

Alternate & Equivalent Parts

Compatible alternatives and drop-in replacements for CD74AC573M96E4:

CD74AC573MGe Solid State

Bus Driver, AC Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20

View Part →

Frequently Asked Questions

What supply voltage range and load capacitance does CD74AC573M96E4 support?

The CD74AC573M96E4 operates across a supply voltage range of 2 V to 6 V, covering both 3.3 V and 5 V logic systems in a single device. Its outputs are rated to drive a 50 pF load capacitance, which accommodates typical PCB trace and component input capacitances found in standard 8-bit bus interface designs without requiring external line-matching components.

How does the transparent latch function of CD74AC573M96E4 help demultiplex a shared address/data bus?

When the latch-enable (LE) input is HIGH, the CD74AC573M96E4 transparently passes all 8 input signals to its outputs in real time. When LE goes LOW, the device latches and holds the last input state, effectively storing 8 bits of address or data while the bus transitions to the next cycle. This behavior is essential for processors with multiplexed 8-bit address/data buses, since the latch captures the address phase and retains it for the full memory read or write cycle, typically lasting several tens of nanoseconds.

What are the 3-state output benefits of CD74AC573M96E4 in a multi-master bus design?

The CD74AC573M96E4 includes an active-LOW output-enable (OE) pin that places all 8 outputs into a high-impedance 3-state condition when de-asserted. This lets multiple CD74AC573 devices share the same 8 output lines without bus contention, which is critical in memory bank switching or multi-source data bus architectures. Each device can be individually selected by its OE pin, allowing a 2-to-8 or wider bus expansion with only standard logic control signals.

When should CD74AC573M96E4 be chosen over CD74HCT573 for a mixed 3.3 V / 5 V board?

CD74AC573M96E4 from the AC CMOS family accepts inputs from 2 V to 6 V and has TTL-compatible input thresholds, making it tolerant of 3.3 V drivers on a 5 V-powered latch and vice versa. In contrast, CD74HCT573 requires VCC at 5 V and has TTL input thresholds only at that voltage. For boards mixing 3.3 V microcontrollers with 5 V peripheral buses, the AC573 provides broader operating margin with propagation delays typically under 10 ns at 5 V, 50 pF load.

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About Texas Instruments

Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.

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