CD74AC273EE4 Texas Instruments Integrated Circuit (Dual-In-Line Packages) In Stock

Texas Instruments CD74AC273EE4 is an octal D-type flip-flop with active-low reset in the AC logic family, operating at up to 71 MHz clock frequency with 24 mA output drive in a 20-pin DIP package. Suitable for 8-bit data latching, bus interfacing, and pipeline register applications at 2 V to 6 V supply. From $0.60 in stock with worldwide shipping.

OBSOLETEIntegrated CircuitVerified May 2026
Package / Visual Reference
CD74AC273EE4Dual-In-Line Packages
Quick Facts
Manufacturer
Texas Instruments
Package
Dual-In-Line Packages
Pin Count
20
Lifecycle
OBSOLETE
Category
Integrated Circuit
Temp Range
-55.0°C to 125.0°C
RoHS
Compliant
Lead Time
3–7 business days
Shipping
DHL Express · Worldwide

What are the key features of CD74AC273EE4?

  • 8-bit (octal) D-type flip-flop captures a full byte of data on each rising clock edge for efficient parallel data storage
  • Up to 71 MHz clock frequency in the AC family enables reliable high-speed data latching in bus-interface and pipeline designs
  • Active-low asynchronous reset clears all 8 outputs simultaneously for fast system initialization without waiting for a clock edge
  • 24 mA output sink current provides strong bus-driving capability when connected to multiple TTL or CMOS inputs in parallel
  • Wide 2 V to 6 V supply range and AC logic family compatibility allow direct interfacing with both 3.3 V and 5 V systems

What is CD74AC273EE4 used for?

The CD74AC273EE4 is widely used as an address or data latch in 8-bit microprocessor bus systems, where its 8 flip-flops simultaneously capture a byte on the rising clock edge and hold it stable while the bus transitions to the next cycle. It also serves as a pipeline register in FPGA prototype and glue-logic boards that need a fast, low-cost discrete register to synchronize parallel data paths running at frequencies up to 71 MHz. In industrial control panels, the device buffers output port signals between a microcontroller and driver ICs, isolating the MCU from load transients.

What are the specifications of CD74AC273EE4?

YTEOL0
FamilyAC
JESD-30 CodeR-PDIP-T20
JESD-609 Codee4
Load Capacitance (CL)50pF
Logic IC TypeD FLIP-FLOP
Max Frequency@Nom-Sup71000000Hz
Max I(ol)0.024A
Number of Bits8
Number of Functions1
Output PolarityTRUE
Package Body MaterialPLASTIC/EPOXY
Package Equivalence CodeDIP20,.3
Package ShapeRECTANGULAR
Package StyleIN-LINE
Packing MethodTUBE
Power Supply Current-Max (ICC)0.16mA
Prop. Delay@Nom-Sup18.9ns
Propagation Delay (tpd)169ns
Qualification StatusNot Qualified
Supply Voltage-Max (Vsup)5.5V
Supply Voltage-Min (Vsup)1.5V
Supply Voltage-Nom (Vsup)5V
Surface MountNO
TechnologyCMOS
Temperature GradeMILITARY
Terminal FinishNICKEL PALLADIUM GOLD
Terminal FormTHROUGH-HOLE
Terminal Pitch2.54mm
Terminal PositionDUAL
Trigger TypePOSITIVE EDGE
fmax-Min100MHz
PackageDual-In-Line Packages

Compliance & Regulatory

RoHS StatusCompliant
Lead-FreeYes (Pb-Free)
HTS Code8542.39.00.60
Country of OriginMalaysia

Where can I find the CD74AC273EE4 datasheet?

CD74AC273EE4 Datasheet Download

Official datasheet from Texas Instruments

What are equivalent replacements for CD74AC273EE4?

No known alternates. Submit an RFQ and our team can suggest alternatives.

Frequently Asked Questions

What is the maximum operating frequency of the CD74AC273EE4, and how does the AC logic family compare to HC at high clock rates?

The CD74AC273EE4 supports a maximum clock frequency of 71 MHz at nominal supply voltage with a 50 pF load capacitance. The AC (Advanced CMOS) logic family is typically 2–3x faster than the HC family under the same conditions, allowing the CD74AC273EE4 to latch 8-bit parallel data reliably in designs clocked above 50 MHz where HC-series flip-flops would fail timing. This makes it a direct upgrade path when system throughput requirements increase.

How does the active-low reset pin on the CD74AC273EE4 assist in system initialization sequences?

The CD74AC273EE4 has an active-low asynchronous reset input that forces all 8 Q outputs to logic LOW regardless of the clock state. This allows a system power-on-reset circuit to clear the register file within nanoseconds of power-up, ensuring output lines are in a known state before the MCU or FPGA begins driving the clock. The asynchronous nature means no clock pulse is needed, which simplifies reset logic in systems where the clock may not be stable during the first few milliseconds after supply ramp-up.

Which package does the CD74AC273EE4 use, and in what prototyping or legacy board scenarios is DIP preferred over SOIC?

The CD74AC273EE4 comes in a 20-pin DIP (R-PDIP-T20) through-hole package with 2.54 mm pin pitch. This package is preferred for breadboard prototyping, educational lab boards, and repair/replacement of legacy industrial equipment originally designed in the 1980s–1990s where the PCB footprint was laid out for DIP components. Through-hole DIP parts also tolerate manual soldering and rework more easily than fine-pitch SMD packages, making the CD74AC273EE4 practical for low-volume hand-assembled prototypes.

Can the CD74AC273EE4 directly drive multiple CMOS or TTL inputs on a bus, given its output current specification?

Yes. The CD74AC273EE4 provides a maximum 24 mA output low current (IOL), which is sufficient to sink current from up to 12 standard CMOS inputs (typically 2 mA each) or 4 LS-TTL loads (8 mA each) simultaneously without violating VOL specifications. Its 50 pF load capacitance rating also means it maintains the 71 MHz timing even when driving short PCB traces connected to several receiving devices, making it a practical bus register for 8-bit parallel data distribution in glue-logic designs.

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About Texas Instruments

Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.

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Lead Time3-7 business days
MOQFrom 1 piece
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OriginChina (Authorized)

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