CD74AC175M Texas Instruments Integrated Circuit (Small Outline Packages) In Stock

Texas Instruments CD74AC175M is a quad D-type flip-flop with reset in a 16-pin SOIC, operating at 50 pF load capacitance with 24 mA output drive. Available from stock with worldwide shipping.

OBSOLETEIntegrated CircuitVerified Jun 2026
Package / Visual Reference
CD74AC175MSmall Outline Packages
Quick Facts
Manufacturer
Texas Instruments
Package
Small Outline Packages
Pin Count
16
Lifecycle
OBSOLETE
Category
Integrated Circuit
Price
From $0.2720(MOQ 1)
Temp Range
-55.0°C to 125.0°C
RoHS
Compliant
Lead Time
3–7 business days
Shipping
DHL Express · Worldwide

What are the key features of CD74AC175M?

  • Four independent D-type flip-flops with active-low reset allow simultaneous or individual bit clearing in a single 16-pin SOIC package
  • AC-logic family delivers high-speed clocking with 50 pF load capacitance and 24 mA output sink current for robust bus drive
  • Complementary outputs (Q and Q-bar) on each flip-flop simplify differential or push-pull logic interface designs without extra inverters
  • Plastic/epoxy SOIC-16 package with RoHS-compliant (e4) finish suits automated SMT assembly in industrial and consumer electronics

What is CD74AC175M used for?

The CD74AC175M is used in high-speed digital systems for data latching, pipeline registers, and synchronous state machines where four bits of storage are needed from a single device. Its complementary outputs and active-low reset make it a natural fit for address/data bus buffering in microcontroller peripheral interfaces, FPGA I/O expansion, and clock-domain crossing circuits. The AC logic family's combination of CMOS low power and TTL-compatible drive levels enables easy integration alongside both legacy TTL and modern 3.3 V or 5 V CMOS logic.

What are the specifications of CD74AC175M?

YTEOL0
FamilyAC
JESD-30 CodeR-PDSO-G16
JESD-609 Codee4
Load Capacitance (CL)50pF
Logic IC TypeD FLIP-FLOP
Max I(ol)0.024A
Number of Functions4
Output PolarityCOMPLEMENTARY
Package Body MaterialPLASTIC/EPOXY
Package Equivalence CodeSOP16,.25
Package ShapeRECTANGULAR
Package StyleSMALL OUTLINE
Packing MethodTUBE
Peak Reflow Temperature (Cel)260
Power Supply Current-Max (ICC)0.16mA
Prop. Delay@Nom-Sup17.1ns
Propagation Delay (tpd)153ns
Qualification StatusNot Qualified
Supply Voltage-Max (Vsup)5.5V
Supply Voltage-Min (Vsup)1.5V
Supply Voltage-Nom (Vsup)5V
Surface MountYES
TechnologyCMOS
Temperature GradeMILITARY
Terminal FinishNICKEL PALLADIUM GOLD
Terminal FormGULL WING
Terminal Pitch1.27mm
Terminal PositionDUAL
Time@Peak Reflow Temperature-Max (s)30
Trigger TypePOSITIVE EDGE
fmax-Min100MHz
PackageSmall Outline Packages

Compliance & Regulatory

RoHS StatusCompliant
Lead-FreeYes (Pb-Free)
Moisture Sensitivity LevelMSL 1
ECCNEAR99
HTS Code8542.39.00.01
Country of OriginMexico

Where can I find the CD74AC175M datasheet?

CD74AC175M Datasheet Download

Official datasheet from Texas Instruments

What are equivalent replacements for CD74AC175M?

Compatible alternatives and drop-in replacements for CD74AC175M:

CD74AC175M96Texas Instruments

D Flip-Flop, AC Series, 4-Func, Positive Edge Triggered, Complementary Output, CMOS, PDSO16

View Part →

Frequently Asked Questions

How does the 24 mA output sink current of the CD74AC175M affect its ability to drive standard logic bus loads?

With a maximum output sink current of 24 mA (I(ol)), the CD74AC175M can drive multiple standard CMOS or TTL inputs simultaneously; a typical CMOS input draws only 1 µA, so the device can fan out to over 20 loads in the AC logic family without voltage degradation. This makes it suitable for address latch or data register roles on moderately loaded 16-bit buses in embedded systems.

At what supply voltage and clock frequency does the CD74AC175M operate reliably in a 3.3 V FPGA design?

The CD74AC175M AC-family devices are specified for 3.3 V and 5 V supplies. At 3.3 V and a 50 pF load capacitance, propagation delays are typically around 7–10 ns, supporting clock frequencies above 80 MHz in pipelined register applications. This makes the device compatible with many FPGA I/O expansion designs where the FPGA core uses 3.3 V LVTTL or LVCMOS standards.

How does the active-low asynchronous reset of the CD74AC175M simplify power-on initialization in a microcontroller system?

The active-low reset input clears all 4 flip-flops to a known 0 state as long as the pin is held low, regardless of the clock. By tying this pin to a power-on reset (POR) circuit that holds it low for at least 100 ns after VCC reaches 3.3 V or 5 V, designers ensure all output lines are in a defined state before the microcontroller begins driving the clock, preventing spurious bus transactions during startup.

When is the CD74AC175M in a 16-pin SOIC preferable to an equivalent device in a 16-pin TSSOP for a space-constrained board?

The 16-pin SOIC body measures approximately 9.9 mm × 6.0 mm with 1.27 mm pin pitch, while a 16-pin TSSOP measures roughly 5 mm × 4.4 mm with 0.65 mm pitch, saving about 70% footprint area. The SOIC is preferred when manual soldering, rework, or optical inspection is required, whereas the TSSOP is chosen for high-density boards where the 50 pF load drive and 24 mA sink current specifications remain identical between both package variants.

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About Texas Instruments

Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.

AvailabilityIn Stock
Reference Price (USD)
From $0.2720
Buy from 1pc · Factory-direct pricing
Qty.Unit PriceExt. Price
1+$0.7700$0.77
3+$0.2930$0.88
10+$0.2820$2.82
25+$0.2720$6.80
pcs
Unit price: $0.7700 · Total: $0.77

In Stock · 24h Response · Worldwide Shipping

Lead Time3-7 business days
MOQFrom 1 piece
ShippingDHL / FedEx / UPS
OriginChina (Authorized)

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