CD54HC138F3A Texas Instruments Integrated Circuit (Ceramic Dual-In-Line Packages) In Stock
CD54HC138F3A is a high-speed CMOS 3-to-8 line decoder/demultiplexer from Texas Instruments with two active-low and one active-high enable inputs. Available in a 16-pin CDIP ceramic package rated for wide temperature ranges. Sourced from stock worldwide with reliable supply.
- Manufacturer
- Texas Instruments
- Package
- Ceramic Dual-In-Line Packages
- Pin Count
- 16
- Lifecycle
- ACTIVE
- Datasheet
- CD54HC138F3A Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $16.7200(MOQ 25)
- Temp Range
- -55.0°C to 125.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- 3-to-8 line decoding with three enable inputs (two active-low, one active-high) for cascaded multi-level address decoding without external gates
- HC/UH CMOS family with 50 pF load capacitance drive capability and 5.2 mA output sink current, compatible with 2 V to 6 V supply rails
- Ceramic CDIP-16 package with extended temperature performance for military, aerospace, and high-reliability industrial environments
Applications
CD54HC138F3A is used in memory address decoding, I/O port expansion, and multiplexed bus architectures where 3 address lines must select one of 8 active-low chip-select outputs. Its three enable inputs allow direct cascading of multiple CD54HC138 devices to decode 4-to-16 or larger address spaces without additional logic gates. The ceramic package makes it suitable for avionics, defense, and industrial control systems operating in wide temperature and harsh vibration environments.
Specifications
| Pbfree Code | Yes |
| YTEOL | 15 |
| Additional Feature | TWO ACTIVE LOW AND ONE ACTIVE HIGH ENABLE INPUTS |
| Family | HC/UH |
| Input Conditioning | STANDARD |
| JESD-30 Code | R-GDIP-T16 |
| JESD-609 Code | e0 |
| Load Capacitance (CL) | 50pF |
| Logic IC Type | 3-LINE TO 8-LINE DECODER |
| Max I(ol) | 0.0052A |
| Number of Bits | 8 |
| Number of Functions | 1 |
| Output Polarity | INVERTED |
| Package Body Material | CERAMIC, GLASS-SEALED |
| Package Equivalence Code | DIP16,.3 |
| Package Shape | RECTANGULAR |
| Package Style | IN-LINE |
| Packing Method | TUBE |
| Power Supply Current-Max (ICC) | 0.16mA |
| Prop. Delay@Nom-Sup | 30ns |
| Propagation Delay (tpd) | 225ns |
| Qualification Status | Not Qualified |
| Screening Level | 38535Q/M;38534H;883B |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Supply Voltage-Nom (Vsup) | 4.5V |
| Surface Mount | NO |
| Technology | CMOS |
| Temperature Grade | MILITARY |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Terminal Form | THROUGH-HOLE |
| Terminal Pitch | 2.54mm |
| Terminal Position | DUAL |
| Package | Ceramic Dual-In-Line Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| ECCN | EAR99 |
| HTS Code | 8542.39.00.90 |
Alternate & Equivalent Parts
Compatible alternatives and drop-in replacements for CD54HC138F3A:
Frequently Asked Questions
How do the three enable inputs of CD54HC138F3A allow cascading for larger address decode schemes?
CD54HC138F3A has two active-low enable inputs (E1-bar and E2-bar) and one active-high enable input (E3). By connecting the outputs of a higher-level decoder to these enable pins, two CD54HC138 devices can be cascaded to decode a 4-to-16 line expansion using only 4 address bits, with E3 of one chip connected to the high-order address bit and the other held enabled, selecting 8 outputs each for a total of 16 unique chip selects.
What output drive current does CD54HC138F3A provide and can it directly drive memory chip-select inputs at 5 V?
CD54HC138F3A provides a maximum output sink current of 5.2 mA (I_OL) at a 5 V supply, which is sufficient to drive the CE-bar inputs of multiple SRAM or ROM chips whose input leakage currents are in the microamp range. Each active-low output can also source current for driving pull-up resistor loads. The 50 pF load capacitance specification ensures reliable switching even when routed across typical PCB trace lengths on memory boards.
For a design requiring operation across -55 degrees C to +125 degrees C, why is the ceramic CDIP package of CD54HC138F3A preferred?
The ceramic CDIP package of CD54HC138F3A provides hermetic sealing that prevents moisture ingress, maintains stable electrical performance from -55 degrees C to +125 degrees C, and withstands mechanical shock and vibration levels specified in MIL-STD-883. Plastic packages absorb humidity which can cause threshold shifts and leakage at temperature extremes, making ceramic packages mandatory for avionics, space, and defense applications where long-term reliability over decades is required.
Which supply voltage range does CD54HC138F3A support and how does that compare to older TTL 74138 decoders?
CD54HC138F3A in the HC CMOS family operates from 2 V to 6 V supply, while legacy bipolar TTL 74LS138 devices require a fixed 5 V plus or minus 5% supply and draw tens of milliamps standby current. The CMOS CD54HC138F3A draws less than 1 µA quiescent current at 5 V, reducing power consumption by more than 100x in standby compared to TTL, and the wider 2 V to 6 V range allows use in 3.3 V logic systems with appropriate interface considerations.
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About Texas Instruments
Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
| Qty. | Unit Price | Ext. Price |
|---|---|---|
| 25+ | $16.7200 | $418.00 |
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