CD54HC107F3A Texas Instruments Integrated Circuit (Ceramic Dual-In-Line Packages) In Stock
The CD54HC107F3A is a dual negative-edge-triggered JK flip-flop from Texas Instruments in the HC/UH CMOS family, housed in a 14-pin ceramic DIP package for high-reliability applications. It operates at up to 20 MHz with a 50 pF load capacitance and 6 mA output sink current, making it suitable for frequency division, sequencing, and state-machine logic. Available in tube packaging for legacy and mil-spec designs requiring ceramic encapsulation.
- Manufacturer
- Texas Instruments
- Package
- Ceramic Dual-In-Line Packages
- Pin Count
- 14
- Lifecycle
- ACTIVE
- Datasheet
- CD54HC107F3A Datasheet PDF
- Category
- Integrated Circuit
- Temp Range
- -55.0°C to 125.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
What are the key features of CD54HC107F3A?
- Dual JK flip-flop with negative-edge triggering supporting up to 20 MHz clock frequency for high-speed state-machine and divider circuits
- 14-pin ceramic DIP package provides MIL-STD-883 reliability for aerospace, defense, and high-reliability industrial applications
- HC/UH CMOS family operation with 50 pF load drive capability enabling compatibility with standard TTL and CMOS logic interconnects
What is CD54HC107F3A used for?
The CD54HC107F3A is used in aerospace avionics, military electronics, and high-reliability industrial controllers where ceramic-packaged logic ICs are required for long-term environmental stability. Its dual JK flip-flop architecture serves frequency divider chains, binary counters, and state-machine toggle stages in clock generation and sequencing circuits operating at up to 20 MHz. The device also appears in legacy system maintenance and board-level replacements where original 14-pin ceramic DIP logic must be substituted with an equivalent HC-family part.
What are the specifications of CD54HC107F3A?
| Pbfree Code | Yes |
| YTEOL | 15 |
| Family | HC/UH |
| JESD-30 Code | R-GDIP-T14 |
| JESD-609 Code | e0 |
| Load Capacitance (CL) | 50pF |
| Logic IC Type | J-K FLIP-FLOP |
| Max Frequency@Nom-Sup | 20000000Hz |
| Max I(ol) | 0.006A |
| Number of Bits | 2 |
| Number of Functions | 2 |
| Output Polarity | COMPLEMENTARY |
| Package Body Material | CERAMIC, GLASS-SEALED |
| Package Equivalence Code | DIP14,.3 |
| Package Shape | RECTANGULAR |
| Package Style | IN-LINE |
| Packing Method | TUBE |
| Power Supply Current-Max (ICC) | 0.08mA |
| Prop. Delay@Nom-Sup | 51ns |
| Propagation Delay (tpd) | 255ns |
| Qualification Status | Not Qualified |
| Schmitt Trigger | NO |
| Screening Level | 38535Q/M;38534H;883B |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Supply Voltage-Nom (Vsup) | 4.5V |
| Surface Mount | NO |
| Technology | CMOS |
| Temperature Grade | MILITARY |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Terminal Form | THROUGH-HOLE |
| Terminal Pitch | 2.54mm |
| Terminal Position | DUAL |
| Trigger Type | NEGATIVE EDGE |
| fmax-Min | 20MHz |
| Package | Ceramic Dual-In-Line Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| ECCN | EAR99 |
| HTS Code | 8542.39.00.90 |
Where can I find the CD54HC107F3A datasheet?
CD54HC107F3A Datasheet DownloadOfficial datasheet from Texas Instruments
What are equivalent replacements for CD54HC107F3A?
No known alternates. Submit an RFQ and our team can suggest alternatives.
Frequently Asked Questions
Why does the CD54HC107F3A use a ceramic DIP package instead of a plastic one for aerospace and defense designs?
The 14-pin ceramic DIP package of the CD54HC107F3A provides hermetic sealing that plastic SOIC or PDIP packages cannot match, preventing moisture ingress and corrosive gas exposure in high-altitude aircraft compartments, missile electronics, and satellite subsystems. Ceramic-packaged ICs also survive thermal cycling from -55°C to 125°C without delamination, meeting MIL-STD-883 screening requirements that plastic packages fail under sustained vibration and temperature extremes common in military programs.
At what maximum clock frequency can the CD54HC107F3A operate, and what limits this in a practical circuit?
The CD54HC107F3A is rated for a maximum clock frequency of 20 MHz at nominal supply voltage with a 50 pF load capacitance. In practice, board-level parasitic capacitance above 50 pF on the clock and output traces will derate the maximum operating frequency, so PCB designers should keep trace lengths under 5 cm and avoid routing clock signals parallel to high-current power rails to maintain reliable 20 MHz toggle operation in counters and divider stages.
How does the JK flip-flop configuration of the CD54HC107F3A differ from a D flip-flop, and when should designers choose it?
The JK flip-flop in the CD54HC107F3A has two independent control inputs—J and K—that allow toggle, set, reset, and hold states in a single clock cycle, while a D flip-flop has only one data input that captures a logic level on each edge. This makes the CD54HC107F3A more efficient for frequency-division-by-2 circuits, where tying J and K high causes the output to toggle at half the 20 MHz clock rate, and for state-machine designs requiring conditional state transitions without external combinatorial logic gates.
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About Texas Instruments
Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
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