CD40107BEE4 Texas Instruments Integrated Circuit (Dual-In-Line Packages) In Stock
CD40107BEE4 is a dual 2-input NAND gate with open-drain outputs from Texas Instruments in the CMOS 4000 series, supporting up to 89 mA sink current and 50 pF load capacitance in an 8-pin DIP package. It targets bus-wired OR configurations, level shifting, LED driving, and open-collector logic interfacing in industrial and consumer electronics.
- Manufacturer
- Texas Instruments
- Package
- Dual-In-Line Packages
- Pin Count
- 8
- Lifecycle
- OBSOLETE
- Datasheet
- CD40107BEE4 Datasheet PDF
- Category
- Integrated Circuit
- Temp Range
- -55.0°C to 125.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- Dual 2-input NAND gate with open-drain outputs for wired-OR bus configurations
- 89 mA maximum output sink current enabling direct LED and relay driving
- 50 pF rated load capacitance supporting moderate-speed bus line driving
- CMOS 4000 series family compatible with wide supply voltage ranges
- 8-pin DIP through-hole package for breadboard prototyping and socketed designs
- RoHS-compliant, Pb-free package (JESD-609 e4) meeting environmental regulations
Applications
The CD40107BEE4 is used in open-drain bus interfacing applications where multiple NAND gate outputs are wire-OR'd together on a shared signal line, such as I2C-style control buses and alarm aggregation circuits. Its 89 mA sink current capability makes it suitable for directly driving indicator LEDs, optocouplers, and small relay coils without additional buffer transistors. The device also serves level-shifting applications in mixed-voltage systems where the pull-up resistor voltage differs from the driving logic supply.
Specifications
| YTEOL | 0 |
| Family | 4000/14000/40000 |
| JESD-30 Code | R-PDIP-T8 |
| JESD-609 Code | e4 |
| Load Capacitance (CL) | 50pF |
| Logic IC Type | NAND GATE |
| Max I(ol) | 0.089A |
| Number of Functions | 2 |
| Number of Inputs | 2 |
| Output Characteristics | OPEN-DRAIN |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | DIP8,.3 |
| Package Shape | RECTANGULAR |
| Package Style | IN-LINE |
| Packing Method | TUBE |
| Power Supply Current-Max (ICC) | 0.12mA |
| Prop. Delay@Nom-Sup | 200ns |
| Propagation Delay (tpd) | 200ns |
| Qualification Status | Not Qualified |
| Schmitt Trigger | NO |
| Supply Voltage-Max (Vsup) | 18V |
| Supply Voltage-Min (Vsup) | 3V |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | NO |
| Technology | CMOS |
| Temperature Grade | MILITARY |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Terminal Form | THROUGH-HOLE |
| Terminal Pitch | 2.54mm |
| Terminal Position | DUAL |
| Package | Dual-In-Line Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| HTS Code | 8542.39.00.60 |
| Country of Origin | Mexico |
Alternate & Equivalent Parts
Compatible alternatives and drop-in replacements for CD40107BEE4:
Frequently Asked Questions
What is the maximum output sink current of the CD40107BEE4, and can it drive an LED directly without a transistor buffer?
The CD40107BEE4 can sink up to 89 mA per output, which comfortably exceeds the 10 mA to 20 mA typically required for standard indicator LEDs. This means a single gate output can directly drive an LED with only a series current-limiting resistor, eliminating the need for a buffer transistor and simplifying the schematic for panel indicator and status display circuits.
How does the open-drain output architecture of the CD40107BEE4 enable wired-OR bus implementations?
With open-drain outputs, the CD40107BEE4 can have multiple gate outputs connected to a single wire with a pull-up resistor to any desired voltage rail. The bus line is pulled low if any one of the connected outputs asserts, implementing a wired-OR function. This is the basis of I2C and similar protocols, allowing distributed control nodes to share a common signal line with pull-up resistors typically in the 1 kΩ to 10 kΩ range.
For a prototyping board design, what physical form factor does the CD40107BEE4 provide and how many pins does it have?
The CD40107BEE4 uses an 8-pin DIP (Dual In-Line Package) with 0.1-inch lead spacing, the most common through-hole format compatible with standard solderless breadboards, IC sockets, and prototype PCBs. The 8-pin DIP body is approximately 9.8 mm long and 6.35 mm wide, making it easy to handle during manual assembly and rework compared to surface-mount alternatives.
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About Texas Instruments
Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.
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