74ALVTH16373GRE4 Texas Instruments Integrated Circuit (Small Outline Packages) In Stock

74ALVTH16373GRE4 is a 16-bit transparent D-type latch from Texas Instruments in the ALVTH logic family, operating from a 2.5 V or 3.3 V supply with output enable active-low control. It provides 24 mA output drive in a 48-pin TSSOP package for high-speed bus buffering and data-hold applications.

OBSOLETEIntegrated CircuitVerified Jun 2026
Package / Visual Reference
74ALVTH16373GRE4Small Outline Packages
Quick Facts
Manufacturer
Texas Instruments
Package
Small Outline Packages
Pin Count
48
Lifecycle
OBSOLETE
Category
Integrated Circuit
Temp Range
-40.0°C to 85.0°C
RoHS
Compliant
Lead Time
3–7 business days
Shipping
DHL Express · Worldwide

What are the key features of 74ALVTH16373GRE4?

  • 16-bit transparent D-type latch with active-low output enable, providing simultaneous data capture and tri-state bus isolation in a single 48-pin TSSOP package
  • ALVTH logic family supports 2.5 V and 3.3 V supply operation with 5 V tolerant inputs, simplifying mixed-voltage bus interfacing between legacy and modern logic devices
  • 24 mA sink current per output with 30 pF load capacitance rating enables fast switching on heavily loaded PCB data buses in high-speed FPGA and memory controller applications

What is 74ALVTH16373GRE4 used for?

The 74ALVTH16373GRE4 is used in high-speed data bus buffering and address latching applications between FPGAs, CPUs, and memory arrays in embedded computing and network switch designs. Its 16-bit width and tri-state output capability enable efficient address/data multiplexing on shared backplane buses operating at 2.5 V or 3.3 V supply rails. The active-low output enable makes it well suited for decoded chip-select glue logic and demultiplexing address buses in microprocessor systems requiring sub-nanosecond propagation delays.

What are the specifications of 74ALVTH16373GRE4?

YTEOL0
Additional FeatureALSO OPERATES WITH 3.3V SUPPLY
Control TypeENABLE LOW
Count DirectionUNIDIRECTIONAL
FamilyALVT
JESD-30 CodeR-PDSO-G48
JESD-609 Codee4
Load Capacitance (CL)30pF
Logic IC TypeBUS DRIVER
Max I(ol)0.024A
Number of Bits8
Number of Functions2
Number of Ports2
Output Characteristics3-STATE
Output PolarityTRUE
Package Body MaterialPLASTIC/EPOXY
Package Equivalence CodeTSSOP48,.3,20
Package ShapeRECTANGULAR
Package StyleSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Packing MethodTR
Peak Reflow Temperature (Cel)260
Power Supply Current-Max (ICC)4.5mA
Prop. Delay@Nom-Sup4.2ns
Propagation Delay (tpd)4.5ns
Qualification StatusNot Qualified
Supply Voltage-Max (Vsup)2.7V
Supply Voltage-Min (Vsup)2.3V
Supply Voltage-Nom (Vsup)2.5V
Surface MountYES
TechnologyBICMOS
Temperature GradeINDUSTRIAL
Terminal FinishNICKEL PALLADIUM GOLD
Terminal FormGULL WING
Terminal Pitch0.5mm
Terminal PositionDUAL
Time@Peak Reflow Temperature-Max (s)30
Trigger TypeHIGH LEVEL
PackageSmall Outline Packages

Compliance & Regulatory

RoHS StatusCompliant
Lead-FreeYes (Pb-Free)
Moisture Sensitivity LevelMSL 1
HTS Code8542.39.00.60

Where can I find the 74ALVTH16373GRE4 datasheet?

74ALVTH16373GRE4 Datasheet Download

Official datasheet from Texas Instruments

What are equivalent replacements for 74ALVTH16373GRE4?

Compatible alternatives and drop-in replacements for 74ALVTH16373GRE4:

74ALVTH16373GRG4Texas Instruments

Bus Driver, ALVT Series, 2-Func, 8-Bit, True Output, BICMOS, PDSO48

View Part →
74ALVTH16373VRE4Texas Instruments

Bus Driver, ALVT Series, 2-Func, 8-Bit, True Output, BICMOS, PDSO48

View Part →

Frequently Asked Questions

What supply voltage range does 74ALVTH16373GRE4 support and can its inputs be driven from a 5 V source?

74ALVTH16373GRE4 operates from a 2.5 V or 3.3 V supply voltage and features 5 V tolerant inputs. This allows the device to interface directly between legacy 5 V logic devices and modern 2.5 V or 3.3 V FPGA I/O banks without level-shifting circuitry, simplifying board design in mixed-voltage digital systems.

How many bits does 74ALVTH16373GRE4 latch and what is its output drive current?

74ALVTH16373GRE4 latches 16 bits simultaneously in transparent mode and holds them when the latch-enable signal is de-asserted. Each output drives up to 24 mA sink current at 0.55 V output voltage, sufficient to drive 30 pF bus capacitance and multiple parallel logic inputs on a PCB data bus without external buffering.

What is the role of the active-low output enable on 74ALVTH16373GRE4 in a multiplexed bus design?

The active-low output enable (OE) on 74ALVTH16373GRE4 tri-states all 16 outputs when de-asserted, disconnecting the latch from the output bus. This allows multiple 74ALVTH16373GRE4 devices to share a single 16-bit bus with only one device driving at a time, implementing bank-selected address or data multiplexing in multi-master embedded processor and FPGA memory controller designs.

Which package does 74ALVTH16373GRE4 use and how does it compare to through-hole 16-bit latch alternatives?

74ALVTH16373GRE4 is housed in a 48-pin TSSOP (R-PDSO-G48) SMT package with 0.5 mm pin pitch, significantly smaller than a DIP-48 through-hole alternative. The TSSOP footprint reduces PCB area by approximately 60% versus DIP, enabling denser bus logic layouts in compact industrial controllers, network switches, and SBC designs while maintaining the same 16-bit latch functionality.

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About Texas Instruments

Texas Instruments (TI) is a global semiconductor company headquartered in Dallas, Texas. TI designs and manufactures analog and embedded processing chips used in industrial, automotive, consumer, communications, and enterprise systems.

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