25LC320/P Microchip Integrated Circuit (Dual-In-Line Packages) In Stock
The 25LC320/P is a 32 Kbit SPI serial EEPROM from Microchip providing 4096 bytes of non-volatile storage with a 2 MHz maximum clock and 1,000,000 write/erase cycle endurance in an 8-pin PDIP package. It features page-write buffering, hardware write protection, and a 200-year minimum data retention rating. Available in stock worldwide for embedded configuration storage and data logging designs.
- Manufacturer
- Microchip
- Package
- Dual-In-Line Packages
- Pin Count
- 8
- Lifecycle
- ACTIVE
- Datasheet
- 25LC320/P Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $0.1667(MOQ 1)
- Temp Range
- ?°C to 70.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- 32 Kbit (4096 bytes) SPI EEPROM with up to 2 MHz clock rate and byte or page write modes enabling fast configuration storage access in microcontroller-based embedded systems
- 1,000,000 write/erase cycle endurance combined with 200-year minimum data retention providing long-term reliable non-volatile storage for industrial logging and calibration data applications
- Hardware write-protect pin and software-controlled block protection allowing selective locking of memory regions to safeguard critical calibration constants from accidental overwrite
Applications
The 25LC320/P is widely used in microcontroller systems to store calibration coefficients, configuration parameters, and user preferences that must survive power cycles without consuming MCU Flash write cycles. Its SPI interface and 8-pin PDIP package make it easy to add persistent storage to Arduino, PIC, and STM32 prototypes and low-volume production boards. Industrial sensor nodes use this device to log event counters and alarm thresholds, relying on its 1,000,000 endurance and 200-year retention to meet field service requirements across the product lifetime.
Specifications
| Pbfree Code | Yes |
| Manufacturer Package Code | PDIP-8 |
| Factory Lead Time | 8Weeks |
| Date Of Intro | 1996-10-01 |
| YTEOL | 3 |
| Clock Frequency-Max (fCLK) | 2MHz |
| Data Retention Time-Min | 200 |
| Endurance | 1000000 Write/Erase Cycles |
| JESD-30 Code | R-PDIP-T8 |
| JESD-609 Code | e3 |
| Memory Density | 32768bit |
| Memory IC Type | EEPROM |
| Memory Width | 8 |
| Number of Functions | 1 |
| Number of Ports | 1 |
| Number of Words | 4096words |
| Number of Words Code | 4000 |
| Operating Mode | SYNCHRONOUS |
| Organization | 4KX8 |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | DIP8,.3 |
| Package Shape | RECTANGULAR |
| Package Style | IN-LINE |
| Parallel/Serial | SERIAL |
| Programming Voltage | 5V |
| Qualification Status | Not Qualified |
| Serial Bus Type | SPI |
| Standby Current-Max | 0.000005A |
| Supply Current-Max | 0.005mA |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 2.5V |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | NO |
| Technology | CMOS |
| Temperature Grade | COMMERCIAL |
| Terminal Finish | MATTE TIN |
| Terminal Form | THROUGH-HOLE |
| Terminal Pitch | 2.54mm |
| Terminal Position | DUAL |
| Write Cycle Time-Max (tWC) | 5ms |
| Write Protection | HARDWARE |
| Package | Dual-In-Line Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| ECCN | EAR99 |
| HTS Code | 8542.32.00.51 |
| Country of Origin | Thailand |
Alternate & Equivalent Parts
No known alternates. Submit an RFQ and our team can suggest alternatives.
Frequently Asked Questions
How much storage capacity does the 25LC320/P provide and how is it organized internally?
The 25LC320/P provides 32 Kbits of storage organized as 4096 bytes addressable via a 12-bit address. The memory is arranged in 16-byte pages for page-write operations, allowing up to 16 bytes to be written in a single write cycle lasting approximately 5 ms, which reduces total programming time by a factor of 16 compared to byte-by-byte writing.
What endurance and data retention specifications does the 25LC320/P offer for industrial data logging?
The 25LC320/P is rated for 1,000,000 write/erase cycles per byte and guarantees a minimum data retention time of 200 years under normal operating conditions. For an industrial event logger that writes 1000 records per day, this endurance exceeds a 2700-year service life at that write rate, far exceeding typical equipment lifetimes without memory wear concerns.
What SPI clock frequency does the 25LC320/P support and which microcontrollers can communicate with it at full speed?
The 25LC320/P supports SPI clock frequencies up to 2 MHz in its standard operating mode across a supply range of 2.5 V to 5.5 V. Most modern 8-bit and 32-bit microcontrollers including PIC, AVR, and STM32 families can communicate at this rate using their hardware SPI peripherals, completing a full 4096-byte sequential read in approximately 20 ms.
How does the hardware write-protect feature of the 25LC320/P help protect stored calibration data from accidental corruption?
The 25LC320/P provides a dedicated active-low WP pin that, when pulled low, blocks all write and erase operations to the portions of memory protected by the internal block-protect register bits. A system designer can tie WP low after initial calibration programming, ensuring that a firmware bug or runaway SPI bus transaction cannot overwrite factory calibration constants across the entire 4096-byte address space.
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| Qty. | Unit Price | Ext. Price |
|---|---|---|
| 1+ | $0.1667 | $0.17 |
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