24LC64F-I/P Microchip Integrated Circuit (Dual-In-Line Packages) In Stock
24LC64F-I/P is a 64 Kbit (8 KB) I2C serial EEPROM from Microchip in an 8-pin PDIP package, supporting up to 400 kHz I2C clock speed and 1,000,000 write/erase cycle endurance with 200-year minimum data retention. It supports up to 8 devices on a single bus via address pins, ideal for configuration and small data logging applications. Available from authorized global distributors with worldwide shipping.
- Manufacturer
- Microchip
- Package
- Dual-In-Line Packages
- Pin Count
- 8
- Lifecycle
- ACTIVE
- Datasheet
- 24LC64F-I/P Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $0.4622(MOQ 10)
- Temp Range
- -40.0°C to 85.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- 64 Kbit (8 KB) I2C serial EEPROM with organized byte/page write access
- Up to 400 kHz I2C Fast Mode clock for efficient data transfer
- 1,000,000 write/erase cycle endurance for high-reliability storage
- Supports 8 devices on a single I2C bus via 3 hardware address pins
- Minimum 200-year data retention ensuring long-term non-volatile storage
- 8-pin PDIP through-hole package suited for prototyping and socketed boards
- RoHS-compliant Pb-free (e3 coded) construction
Applications
The 24LC64F-I/P is commonly used for storing firmware configuration tables, user preferences, calibration coefficients, and small data logs in embedded systems including home appliances, industrial controllers, and medical monitoring devices. Its 64 Kbit I2C EEPROM capacity and Fast Mode 400 kHz interface allow efficient read/write cycles from virtually any microcontroller with an I2C peripheral. The 8-pin PDIP package provides convenience for development and low-volume production where through-hole assembly is preferred.
Specifications
| Pbfree Code | Yes |
| Manufacturer Package Code | PDIP-8 |
| Factory Lead Time | 8Weeks |
| YTEOL | 8 |
| Clock Frequency-Max (fCLK) | 0.4MHz |
| Data Retention Time-Min | 200 |
| Endurance | 1000000 Write/Erase Cycles |
| I2C Control Byte | 1010DDDR |
| JESD-30 Code | R-PDIP-T8 |
| JESD-609 Code | e3 |
| Memory Density | 65536bit |
| Memory IC Type | EEPROM |
| Memory Width | 8 |
| Number of Functions | 1 |
| Number of Ports | 1 |
| Number of Words | 8192words |
| Number of Words Code | 8000 |
| Operating Mode | SYNCHRONOUS |
| Organization | 8KX8 |
| Output Characteristics | OPEN-DRAIN |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | DIP8,.3 |
| Package Shape | RECTANGULAR |
| Package Style | IN-LINE |
| Parallel/Serial | SERIAL |
| Programming Voltage | 5V |
| Qualification Status | Not Qualified |
| Screening Level | TS 16949 |
| Serial Bus Type | I2C |
| Standby Current-Max | 0.000001A |
| Supply Current-Max | 0.003mA |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 2.5V |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | NO |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | Matte Tin (Sn) |
| Terminal Form | THROUGH-HOLE |
| Terminal Pitch | 2.54mm |
| Terminal Position | DUAL |
| Write Cycle Time-Max (tWC) | 5ms |
| Write Protection | HARDWARE |
| Package | Dual-In-Line Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| ECCN | EAR99 |
| HTS Code | 8542.32.00.51 |
| Country of Origin | Thailand |
Alternate & Equivalent Parts
Compatible alternatives and drop-in replacements for 24LC64F-I/P:
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Frequently Asked Questions
What is the memory capacity and maximum I2C clock speed of 24LC64F-I/P?
The 24LC64F-I/P provides 64 Kbits (8 KB) of non-volatile EEPROM storage accessible via the I2C interface at up to 400 kHz clock frequency (Fast Mode). This capacity is well-suited for storing calibration tables, event logs, and firmware parameters in microcontroller systems where the 2-wire I2C bus is already used for other peripherals.
How many 24LC64F-I/P devices can share one I2C bus and what write endurance do they support?
Up to 8 units of the 24LC64F-I/P can be connected simultaneously on a single I2C bus using the 3 hardware address pins (A0, A1, A2), providing up to 64 KB of total addressable EEPROM per bus. Each device is rated for 1,000,000 write/erase cycles, ensuring decades of reliable operation even in applications performing frequent small writes such as real-time data logging.
For a design needing more storage than 24LC64F-I/P, what upgrade path is available within the same 8-pin PDIP footprint?
Designers requiring more than 64 Kbits (8 KB) can upgrade to the pin-compatible 24LC128 (128 Kbit), 24LC256 (256 Kbit), or 24LC512 (512 Kbit) devices, all available in the same 8-pin PDIP package and sharing the same I2C protocol. These parts require only a firmware address map change, with no hardware redesign needed — enabling a simple drop-in capacity upgrade without PCB respins.
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| Qty. | Unit Price | Ext. Price |
|---|---|---|
| 10+ | $1.0900 | $10.90 |
| 25+ | $1.0400 | $26.00 |
| 60+ | $0.5198 | $31.19 |
| 2640+ | $0.4671 | $1233.04 |
| 5280+ | $0.4647 | $2453.35 |
| 10560+ | $0.4622 | $4881.25 |
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