24LC256-I/P Microchip Integrated Circuit (Dual-In-Line Packages) In Stock
The Microchip 24LC256-I/P is a 256 Kbit (32 KB) I2C serial EEPROM in an 8-pin DIP package, operating at up to 400 kHz clock frequency with 1,000,000 write/erase cycle endurance and 200-year minimum data retention. It supports 2.5 V to 5.5 V supply voltage, making it ideal for low-power embedded storage applications. From $0.60, in stock with worldwide shipping.
- Manufacturer
- Microchip
- Package
- Dual-In-Line Packages
- Pin Count
- 8
- Lifecycle
- ACTIVE
- Datasheet
- 24LC256-I/P Datasheet PDF
- Category
- Integrated Circuit
- Temp Range
- -40.0°C to 85.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
What are the key features of 24LC256-I/P?
- 256 Kbit (32 KB) I2C EEPROM with up to 400 kHz clock frequency and 2.5 V to 5.5 V wide supply voltage range
- 1,000,000 write/erase cycle endurance with 200-year minimum data retention ensures reliable non-volatile storage in demanding applications
- 8-pin DIP package with I2C 2-wire interface simplifies PCB layout and allows up to 8 devices on a single bus via address pins
What is 24LC256-I/P used for?
The 24LC256-I/P is used for non-volatile configuration storage, calibration data logging, and firmware parameter retention in microcontroller-based systems, industrial sensors, and consumer electronics. Its I2C 2-wire interface and 32 KB capacity make it suitable for storing user settings, device identifiers, and look-up tables in low-power embedded designs. Engineers frequently use this EEPROM in medical devices, smart meters, and IoT nodes where reliable data persistence across power cycles is essential.
What are the specifications of 24LC256-I/P?
| Pbfree Code | Yes |
| Manufacturer Package Code | PDIP-8 |
| Factory Lead Time | 9Weeks |
| YTEOL | 8 |
| Clock Frequency-Max (fCLK) | 0.4MHz |
| Data Retention Time-Min | 200 |
| Endurance | 1000000 Write/Erase Cycles |
| I2C Control Byte | 1010DDDR |
| JESD-30 Code | R-PDIP-T8 |
| JESD-609 Code | e3 |
| Memory Density | 262144bit |
| Memory IC Type | EEPROM |
| Memory Width | 8 |
| Number of Functions | 1 |
| Number of Ports | 1 |
| Number of Words | 32768words |
| Number of Words Code | 32000 |
| Operating Mode | SYNCHRONOUS |
| Organization | 32KX8 |
| Output Characteristics | OPEN-DRAIN |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | DIP8,.3 |
| Package Shape | RECTANGULAR |
| Package Style | IN-LINE |
| Parallel/Serial | SERIAL |
| Programming Voltage | 4.5V |
| Qualification Status | Not Qualified |
| Reverse Pinout | NO |
| Screening Level | AEC-Q100 |
| Serial Bus Type | I2C |
| Standby Current-Max | 0.000005A |
| Supply Current-Max | 0.003mA |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 2.5V |
| Supply Voltage-Nom (Vsup) | 4.5V |
| Surface Mount | NO |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | Matte Tin (Sn) |
| Terminal Form | THROUGH-HOLE |
| Terminal Pitch | 2.54mm |
| Terminal Position | DUAL |
| Write Cycle Time-Max (tWC) | 5ms |
| Write Protection | HARDWARE |
| Package | Dual-In-Line Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| ECCN | EAR99 |
| HTS Code | 8542.32.00.51 |
| Country of Origin | Thailand |
Where can I find the 24LC256-I/P datasheet?
24LC256-I/P Datasheet DownloadOfficial datasheet from Microchip
What are equivalent replacements for 24LC256-I/P?
Compatible alternatives and drop-in replacements for 24LC256-I/P:
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Frequently Asked Questions
How much storage capacity does the 24LC256-I/P provide and at what interface speed does it operate?
The 24LC256-I/P provides 256 Kbits (32 KB) of non-volatile EEPROM storage accessible via the I2C interface at up to 400 kHz (Fast mode). This makes it suitable for storing calibration tables, configuration records, or log data in embedded systems where a compact 8-pin DIP footprint and low pin count are priorities.
How many write cycles can the 24LC256-I/P sustain before wear affects data integrity?
The 24LC256-I/P is rated for a minimum of 1,000,000 write/erase cycles per byte location, along with a minimum data retention period of 200 years. This endurance level exceeds the requirements of most configuration and calibration storage applications, where a typical system writes to EEPROM only hundreds to thousands of times across its service life.
Can multiple 24LC256-I/P devices share the same I2C bus in a design, and how are they addressed?
Yes, up to 8 units of 24LC256-I/P can coexist on a single I2C bus simultaneously. Each device is addressed using the I2C control byte format 1010DDDR, where the 3 hardware address pins (A0, A1, A2) define a unique 3-bit device address, supporting a combined addressable capacity of 8 x 32 KB = 256 KB on a 2-wire bus running at up to 400 kHz.
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| 2+ | $0.9554 | $1.91 |
| 150+ | $0.5850 | $87.75 |
| 360+ | $0.0000 | $0.00 |
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