24LC256-I/MS Microchip Integrated Circuit (Small Outline Packages) In Stock
Microchip 24LC256-I/MS is a 256 Kbit (32K x 8) I2C serial EEPROM with a 400 kHz bus speed, operating from a 2.5 V to 5.5 V supply with up to 1,000,000 write/erase cycles and 200-year data retention. It features hardware write protection and a 64-byte page write buffer in an 8-pin MSOP package. Available worldwide from authorized distributors.
- Manufacturer
- Microchip
- Package
- Small Outline Packages
- Pin Count
- 8
- Lifecycle
- ACTIVE
- Datasheet
- 24LC256-I/MS Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $0.4260(MOQ 1)
- Temp Range
- -40.0°C to 85.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- 256 Kbit (32K x 8) I2C EEPROM with 400 kHz fast-mode support and 64-byte page write buffer for fast sequential writes
- 1,000,000 minimum write/erase cycle endurance with 200-year data retention for reliable long-life non-volatile storage
- Hardware write-protect pin (WP) and three address pins (A0/A1/A2) allowing up to 8 devices on a single I2C bus
Applications
The 24LC256-I/MS is widely used for storing configuration data, calibration tables, and event logs in embedded systems such as industrial controllers, medical instruments, and automotive telematics units where compact 8-pin MSOP packaging saves board space. Its 400 kHz I2C interface connects directly to microcontrollers like PIC, AVR, and ARM Cortex-M without any additional glue logic. The hardware write-protect pin and address selection allow multiple EEPROMs to share a single I2C bus, enabling scalable non-volatile storage expansion.
Specifications
| Pbfree Code | Yes |
| Manufacturer Package Code | MSOP-8 |
| Factory Lead Time | 11Weeks |
| YTEOL | 8 |
| Clock Frequency-Max (fCLK) | 0.4MHz |
| Data Retention Time-Min | 200 |
| Endurance | 1000000 Write/Erase Cycles |
| I2C Control Byte | 1010DDDR |
| JESD-30 Code | S-PDSO-G8 |
| JESD-609 Code | e3 |
| Memory Density | 262144bit |
| Memory IC Type | EEPROM |
| Memory Width | 8 |
| Number of Functions | 1 |
| Number of Ports | 1 |
| Number of Words | 32768words |
| Number of Words Code | 32000 |
| Operating Mode | SYNCHRONOUS |
| Organization | 32KX8 |
| Output Characteristics | OPEN-DRAIN |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | SOP8,.19 |
| Package Shape | SQUARE |
| Package Style | SMALL OUTLINE |
| Parallel/Serial | SERIAL |
| Peak Reflow Temperature (Cel) | 260 |
| Programming Voltage | 4.5V |
| Qualification Status | Not Qualified |
| Reverse Pinout | NO |
| Screening Level | AEC-Q100 |
| Serial Bus Type | I2C |
| Standby Current-Max | 0.000005A |
| Supply Current-Max | 0.003mA |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 2.5V |
| Supply Voltage-Nom (Vsup) | 4.5V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | Matte Tin (Sn) |
| Terminal Form | GULL WING |
| Terminal Pitch | 0.65mm |
| Terminal Position | DUAL |
| Write Cycle Time-Max (tWC) | 5ms |
| Write Protection | HARDWARE |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| ECCN | EAR99 |
| HTS Code | 8542.32.00.51 |
| Country of Origin | Thailand |
Alternate & Equivalent Parts
Compatible alternatives and drop-in replacements for 24LC256-I/MS:
Frequently Asked Questions
How long does a full 256 Kbit sequential write take on 24LC256-I/MS at 400 kHz I2C?
At 400 kHz I2C clock speed, transferring 32,768 bytes of data requires approximately 820 ms of bus time including address and ACK overhead. However, the 24LC256-I/MS uses an internal 5 ms write cycle per 64-byte page, so a full-device write across 512 pages takes around 2.56 seconds of actual EEPROM write time, regardless of bus speed. Firmware must poll the ACK or use a fixed 5 ms delay between consecutive page writes.
How many 24LC256-I/MS devices can share one I2C bus and how are they addressed?
Up to 8 devices can be connected to a single I2C bus simultaneously using the three hardware address pins (A0, A1, A2), which set the lower 3 bits of the I2C control byte 1010DDDR. Each device responds to a unique 7-bit address from 0x50 to 0x57, enabling a total of 256 Kbit x 8 = 2 Mbit (256 KB) of addressable EEPROM storage on one bus without any external multiplexing.
For a medical device design, how does the 24LC256-I/MS meet data integrity requirements?
The 24LC256-I/MS provides 1,000,000 minimum write/erase cycle endurance per byte location and 200-year data retention at 25°C, meeting the long-life requirements of medical and industrial calibration data. The hardware write-protect pin (WP) locks the entire array when asserted high, preventing accidental overwrites during manufacturing or field use. Combined with I2C bus arbitration, it supports reliable multi-master configurations found in smart sensor and data-logger architectures.
What is the minimum supply voltage for 24LC256-I/MS and does it support 1.8 V microcontroller I/O?
The 24LC256-I/MS operates from a 2.5 V minimum supply, which does not directly support 1.8 V microcontroller I/O without level translation. For 1.8 V systems, Microchip offers the 24AA256 variant with a 1.7 V minimum supply. The -I/MS industrial-grade version is rated for -40°C to +85°C operation in the 8-pin MSOP package, suitable for most non-automotive environments at 2.5 V to 5.5 V supply rails.
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| Qty. | Unit Price | Ext. Price |
|---|---|---|
| 1+ | $1.1200 | $1.12 |
| 2+ | $0.9208 | $1.84 |
| 25+ | $0.4260 | $10.65 |
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