24LC128-I/MS Microchip Integrated Circuit (Small Outline Packages) In Stock
Microchip 24LC128-I/MS is a 128 Kbit I2C CMOS serial EEPROM with up to 400 kHz clock frequency in a compact MSOP-8 package. It offers 1,000,000 write/erase endurance cycles and 200-year data retention for reliable non-volatile storage. Available in lead-free MSOP-8 format for embedded systems requiring space-efficient I2C memory.
- Manufacturer
- Microchip
- Package
- Small Outline Packages
- Pin Count
- 8
- Lifecycle
- ACTIVE
- Datasheet
- 24LC128-I/MS Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $0.3900(MOQ 1)
- Temp Range
- -40.0°C to 85.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- 128 Kbit I2C serial EEPROM with 400 kHz Fast-mode I2C interface for high-speed host communication
- 1,000,000 write/erase endurance cycles with 200-year minimum data retention for long-life embedded systems
- Compact MSOP-8 package with address pins supporting up to 8 devices on a single I2C bus
Applications
The 24LC128-I/MS is designed for embedded systems requiring reliable non-volatile storage of configuration data, calibration tables, and user settings over a 2-wire I2C interface. It is ideal for applications such as industrial sensor nodes, medical devices, consumer electronics, and automotive body modules where 128 Kbit capacity and 400 kHz I2C speed satisfy typical data logging and parameter storage requirements. Its small MSOP-8 footprint enables integration onto space-constrained PCBs alongside microcontrollers and sensor ICs.
Specifications
| Pbfree Code | Yes |
| Manufacturer Package Code | MSOP-8 |
| Factory Lead Time | 13Weeks |
| YTEOL | 8 |
| Clock Frequency-Max (fCLK) | 0.4MHz |
| Data Retention Time-Min | 200 |
| Endurance | 1000000 Write/Erase Cycles |
| I2C Control Byte | 1010DDDR |
| JESD-30 Code | S-PDSO-G8 |
| JESD-609 Code | e3 |
| Memory Density | 131072bit |
| Memory IC Type | EEPROM |
| Memory Width | 8 |
| Number of Functions | 1 |
| Number of Ports | 1 |
| Number of Words | 16384words |
| Number of Words Code | 16000 |
| Operating Mode | SYNCHRONOUS |
| Organization | 16KX8 |
| Output Characteristics | OPEN-DRAIN |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | SOP8,.19 |
| Package Shape | SQUARE |
| Package Style | SMALL OUTLINE |
| Parallel/Serial | SERIAL |
| Peak Reflow Temperature (Cel) | 260 |
| Programming Voltage | 4.5V |
| Qualification Status | Not Qualified |
| Screening Level | AEC-Q100 |
| Serial Bus Type | I2C |
| Standby Current-Max | 0.000005A |
| Supply Current-Max | 0.003mA |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 2.5V |
| Supply Voltage-Nom (Vsup) | 4.5V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | Matte Tin (Sn) |
| Terminal Form | GULL WING |
| Terminal Pitch | 0.65mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Write Cycle Time-Max (tWC) | 5ms |
| Write Protection | HARDWARE |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| ECCN | EAR99 |
| HTS Code | 8542.32.00.51 |
| Country of Origin | Thailand |
Alternate & Equivalent Parts
Compatible alternatives and drop-in replacements for 24LC128-I/MS:
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Frequently Asked Questions
What is the maximum clock frequency supported by the 24LC128-I/MS, and does it work with standard I2C masters?
The 24LC128-I/MS supports a maximum clock frequency of 400 kHz, which is the I2C Fast-mode standard. This makes it directly compatible with any microcontroller or processor offering a standard 100 kHz or 400 kHz I2C peripheral without any special configuration, covering the vast majority of embedded platforms.
How many write cycles can the 24LC128-I/MS sustain before wear affects data reliability?
The 24LC128-I/MS is rated for a minimum of 1,000,000 write/erase cycles per byte location, with a minimum data retention time of 200 years at room temperature. This endurance far exceeds requirements for configuration storage applications that update settings tens or hundreds of times over a product lifetime.
How many 24LC128-I/MS devices can share a single I2C bus using address pins?
Up to 8 devices of the 24LC128-I/MS can be placed on a single I2C bus simultaneously by configuring the 3 hardware address pins (A0, A1, A2). This allows a total of 1 Mbit of serial EEPROM capacity on one 2-wire bus without bus arbitration conflicts, ideal for data-logging systems with multiple memory banks.
How does the MSOP-8 package of the 24LC128-I/MS compare to SOIC-8 for density-critical designs?
The MSOP-8 package of the 24LC128-I/MS has a body area of approximately 9 mm² versus approximately 29 mm² for an SOIC-8, saving about 70% PCB footprint. This size reduction is significant in wearable and handheld devices where every square millimeter of PCB real estate competes with battery and sensor placement.
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| Qty. | Unit Price | Ext. Price |
|---|---|---|
| 1+ | $0.8520 | $0.85 |
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| 500+ | $0.4050 | $202.50 |
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