24FC1025-I/SN Microchip Integrated Circuit (Small Outline Packages) In Stock
Microchip 24FC1025-I/SN is a 1 Mbit I2C EEPROM in an 8-pin SOIC package, supporting clock speeds up to 1 MHz with 1 million write/erase endurance cycles and 200-year data retention. Available from stock with worldwide shipping.
- Manufacturer
- Microchip
- Package
- Small Outline Packages
- Pin Count
- 8
- Lifecycle
- ACTIVE
- Datasheet
- 24FC1025-I/SN Datasheet PDF
- Category
- Integrated Circuit
- Price
- From $0.8831(MOQ 1)
- Temp Range
- -40.0°C to 85.0°C
- RoHS
- Compliant
- Lead Time
- 3–7 business days
- Shipping
- DHL Express · Worldwide
Key Features
- 1 Mbit I2C EEPROM with up to 1 MHz Fast-Mode Plus clock frequency for rapid read/write access in embedded systems
- Up to 1,000,000 write/erase cycles endurance with 200-year data retention for long-life industrial and consumer applications
- Hardware address pins supporting up to 4 devices on a single I2C bus, minimising GPIO consumption in multi-EEPROM designs
Applications
24FC1025-I/SN is used to store configuration parameters, calibration data, and firmware version records in microcontroller-based systems requiring non-volatile memory between power cycles. Its 1 MHz I2C interface and 128-byte page write buffer make it well suited for data logging, industrial controller settings storage, and smart meter calibration tables. The SOIC-8 package and 2.5 V to 5.5 V operating range allow straightforward integration into a wide variety of 3.3 V and 5 V embedded designs.
Specifications
| Pbfree Code | Yes |
| Manufacturer Package Code | SOIC-8 |
| Factory Lead Time | 26Weeks |
| YTEOL | 8 |
| Clock Frequency-Max (fCLK) | 1MHz |
| Data Retention Time-Min | 200 |
| Endurance | 1000000 Write/Erase Cycles |
| I2C Control Byte | 1010MDDR |
| JESD-30 Code | R-PDSO-G8 |
| JESD-609 Code | e3 |
| Memory Density | 1048576bit |
| Memory IC Type | EEPROM |
| Memory Width | 8 |
| Number of Functions | 1 |
| Number of Ports | 1 |
| Number of Words | 131072words |
| Number of Words Code | 128000 |
| Operating Mode | SYNCHRONOUS |
| Organization | 128KX8 |
| Output Characteristics | OPEN-DRAIN |
| Package Body Material | PLASTIC/EPOXY |
| Package Equivalence Code | SOP8,.25 |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE |
| Parallel/Serial | SERIAL |
| Peak Reflow Temperature (Cel) | 260 |
| Programming Voltage | 2.5V |
| Qualification Status | Not Qualified |
| Serial Bus Type | I2C |
| Standby Current-Max | 0.000005A |
| Supply Current-Max | 0.005mA |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 1.8V |
| Supply Voltage-Nom (Vsup) | 2.5V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | Matte Tin (Sn) |
| Terminal Form | GULL WING |
| Terminal Pitch | 1.27mm |
| Terminal Position | DUAL |
| Write Cycle Time-Max (tWC) | 5ms |
| Write Protection | HARDWARE |
| Package | Small Outline Packages |
Compliance & Regulatory
| RoHS Status | Compliant |
| Lead-Free | Yes (Pb-Free) |
| Moisture Sensitivity Level | MSL 1 |
| ECCN | EAR99 |
| HTS Code | 8542.32.00.51 |
| Country of Origin | Thailand |
Alternate & Equivalent Parts
Compatible alternatives and drop-in replacements for 24FC1025-I/SN:
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Frequently Asked Questions
How many bytes can be written to 24FC1025-I/SN in a single page write operation?
24FC1025-I/SN supports a 128-byte page write buffer, meaning up to 128 bytes can be loaded into the device in one I2C transaction before the internal write cycle begins. The self-timed write completes within 5 ms, after which the bus is released. Using sequential page writes, a full 1 Mbit (131,072 bytes) of memory can be programmed efficiently without requiring byte-by-byte polling across 1,024 separate transactions.
What supply voltage range does 24FC1025-I/SN support and which microcontroller families can interface with it directly?
24FC1025-I/SN operates from 2.5 V to 5.5 V, making it compatible with 3.3 V ARM Cortex-M microcontrollers, 5 V AVR or PIC devices, and most modern SoC platforms without a separate level translator. The I2C SDA and SCL pins are open-drain, so only pull-up resistors to the logic supply voltage, typically 4.7 kΩ at 100 kHz or 2.2 kΩ at 1 MHz, are required for a complete interface.
How many 24FC1025-I/SN devices can share a single I2C bus for expanded non-volatile storage?
Up to 4 units of 24FC1025-I/SN can be connected on one I2C bus simultaneously using the A1 and A0 hardware address pins, providing a combined capacity of 4 Mbits (512 kbytes). Each device responds to a unique 7-bit I2C address in the range 1010MDDR, where M selects the upper memory block and DDR sets the device address. No additional glue logic or address decoders are needed beyond correct A0/A1 pin wiring.
At what endurance level should 24FC1025-I/SN be considered for a design that rewrites data every hour around the clock?
24FC1025-I/SN is rated for 1,000,000 write/erase cycles per byte location. An application writing a specific byte every hour accumulates 8,760 write cycles per year, exhausting the rated endurance after approximately 114 years. For applications with far faster update rates, wear-levelling firmware that distributes writes across the 131,072 available byte locations can extend effective device life significantly beyond the per-cell guarantee.
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| Qty. | Unit Price | Ext. Price |
|---|---|---|
| 1+ | $1.0284 | $1.03 |
| 25+ | $1.0148 | $25.37 |
| 100+ | $1.0022 | $100.22 |
| 1600+ | $0.9140 | $1462.32 |
| 3200+ | $0.8985 | $2875.14 |
| 6400+ | $0.8831 | $5652.03 |
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