Integrated Circuit
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77,666 components
How to Choose Integrated Circuit Components
- 1Verify electrical specifications (voltage, current, frequency) match your design requirements.
- 2Check package footprint and thermal characteristics against your PCB layout constraints.
- 3Confirm lifecycle status and long-term availability for production designs.
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Integrated Circuit Guides & Articles
How to Choose 150141BS73100 for Wurth 3528 SMT LED Indicator Designs
Selection guide for 150141BS73100 and Wurth 3528 SMT LED variants covering color, drive current, package fit, optics, and sourcing.
Jul 9, 2026
How to Choose EEEFT1V101AP for SMD Aluminum Electrolytic Capacitor Designs
Selection guide for EEEFT1V101AP and related Panasonic EEE-FT SMD aluminum electrolytic capacitors covering voltage, ESR, lifetime, and sourcing.
Jul 9, 2026
How to Choose a Panasonic FT SMD Aluminum Electrolytic Capacitor for 35 V Control Rails
Selection guide for EEEFT1V101AP and related Panasonic FT/FK SMD aluminum electrolytic capacitors on 35 V and lower control rails.
Jul 8, 2026
EEEFK1E470P Design Guide for 24 V Control-Board Hold-Up
Design EEEFK1E470P into 12 V and 24 V control boards with correct voltage derating, ripple checks, layout, and sourcing alternatives.
Jul 8, 2026
All Integrated Circuit Components
Showing 9,051–9,100 of 77,666
Use the download button to access the MAX809TTRG schematic symbol, PCB footprint, and 3D model.
Precision VCC Monitor for 1.5 V, 1.8V, 2.5 V, 3.0 V, 3.3 V and 5.0 V supplies; Precision Monitoring Voltages from 1.2 V to 4.9 V Available in 100 mV Steps; Four Guaranteed Minimum RESET Output Duration (1ms, 20ms, 100ms and 140ms); RESET Output Guaranteed to VCC = 1.0 V; Low 1.0 µA Supply Current; VCC Transient Immunity; Small SOT-23 and SC-70 Package; No External Components; Wide Operating Temperature: -40°C to 105°C; NCV Version for Automotive
TSOP-6
Use the download button to access the MAX809SQ263T1G schematic symbol, PCB footprint, and 3D model.
Use the download button to access the MAX809HTRG schematic symbol, PCB footprint, and 3D model.
SOP, SOP8,.25
Use the download button to access the MAX708RESA-TG schematic symbol, PCB footprint, and 3D model.
CASE 221A-09, 3 PIN
LEAD FREE, CASE 221A-09, 3 PIN
MAC4DSM-1G , TRIAC, 600V 4A, Gate Trigger 1.3V 10mA, 3-Pin DPAK | ON Semiconductor MAC4DSM-1G
MAC228A8TG, THY T0220 8A 600V TRIAC
THY T0220 8A 800V TRIAC LEAD FREE
THY T0220 15A 600V TRIAC LEAD FREE
CASE 221A-09, 3 PIN
CASE 221A-09, 3 PIN
CASE 221A-09, 3 PIN
CASE 221A-09, 3 PIN
CASE 221A-09, 3 PIN
Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; High Speed: tPD = 4.8ns (Typ) at VCC = 5V; Pin and Function Compatible with Other Standard Logic Families; CMOS-Compatible Outputs: VOH > 0.8VCC ; VOL < 0.1VCC @Load; Chip Complexity: FETs = <100; Pb-Free Packages are Available; Designed for 2.0 V to 5.5 V VCC Operation; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; Power Down Protection Provided on Inputs and Outputs; Balanced Propagation Delays
Designed for 2.0 V to 5.5 V VCC Operation; High Speed: tPD = 2.5ns (Typ) at VCC = 5V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; Power Down Protection Provided on Inputs; Balanced Propagation Delays; Pin and Function Compatible with Other Standard Logic Families; Chip Complexity: FETs = 105; Pb-Free Packages are Available
High Speed: tPD = 2.5ns (Typ) at VCC = 5V; Power Down Protection Provided on Inputs; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; Balanced Propagation Delays; Pin and Function Compatible with Other Standard Logic Families; Chip Complexity: FETs = 105; Designed for 2.0 V to 5.5 V VCC Operation; Pb-Free Packages are Available
Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; High Speed: tPD = 4.8ns (Typ) at VCC = 5V; Pin and Function Compatible with Other Standard Logic Families; CMOS-Compatible Outputs: VOH > 0.8VCC ; VOL < 0.1VCC @Load; Chip Complexity: FETs = <100; Pb-Free Packages are Available; Designed for 2.0 V to 5.5 V VCC Operation; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; Power Down Protection Provided on Inputs and Outputs; Balanced Propagation Delays
High Speed: tPD = 2.5ns (Typ) at VCC = 5V; Power Down Protection Provided on Inputs; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; Balanced Propagation Delays; Pin and Function Compatible with Other Standard Logic Families; Chip Complexity: FETs = 105; Designed for 2.0 V to 5.5 V VCC Operation; Pb-Free Packages are Available
Designed for 2.0 V to 5.5 V VCC Operation; High Speed: tPD = 4.8ns (Typ) at VCC = 5V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; CMOS-Compatible Outputs: VOH > 0.8VCC ; VOL < 0.1VCC @Load; Power Down Protection Provided on Inputs and Outputs; Balanced Propagation Delays; Pin and Function Compatible with Other Standard Logic Families; Chip Complexity: FETs = <100; Pb-Free Packages are Available
CMOS-Compatible Outputs: VOH > 0.8VCC ; VOL < 0.1VCC @ Load; High Speed: tPD = 3.5ns (Typ) at VCC = 5V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; Pin and Function Compatible with Other Standard Logic Families; Balanced Propagation Delays; Power Down Protection Provided on Inputs and Outputs; Pb-Free Packages are Available; Designed for 1.65 V to 5.5 V Vcc Operation
Use the download button to access the M74VHC1GT66DTT1G schematic symbol, PCB footprint, and 3D model.
High Speed: tPD = 3.5ns (Typ) at VCC = 5V; Low threshold Inputs, TTL compatible if Vcc= 5 V: VIL = 0.8V; VIH = 2.0V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; CMOS-Compatible Outputs: VOH > 0.8VCC ; VOL < 0.1VCC @Load; Wide Operating Vcc Rang; Power Down Protection Provided on Inputs and Outputs; Balanced Propagation Delays; Pin and Function Compatible with Other Standard Logic Families; Chip Complexity: FETs = ≤ 100; Pb-Free Packages are Available
High Speed: tPD = 3.5ns (Typ) at VCC = 5V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; CMOS-Compatible Outputs: VOH > 0.8VCC ; VOL < 0.1VCC @ Load; Power Down Protection Provided on Inputs and Outputs; Balanced Propagation Delays; Pin and Function Compatible with Other Standard Logic Families; Pb-Free Packages are Available; Designed for 1.65 V to 5.5 V Vcc Operation
TSOP-5
Use the download button to access the M74VHC1GT66DFT1G schematic symbol, PCB footprint, and 3D model.
CMOS-Compatible Outputs: VOH > 0.8VCC ; VOL < 0.1VCC @ Load; High Speed: tPD = 3.5ns (Typ) at VCC = 5V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; Pin and Function Compatible with Other Standard Logic Families; Balanced Propagation Delays; Power Down Protection Provided on Inputs and Outputs; Pb-Free Packages are Available; Designed for 1.65 V to 5.5 V Vcc Operation
Designed for 2.0 V to 5.5 V VCC Operation; High Speed: tPD = 3.7 ns (Typ) at VCC = 5 V; Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C; TTL-Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V; CMOS-Compatible Outputs: VOH > 0.8 VCC ; VOL < 0.1 VCC @Load; Power Down Protection Provided on Inputs and Outputs; Balanced Propagation Delays; Pin and Function Compatible with Other Standard Logic Families; Chip Complexity: FETs = ≤ 100; Pb-Free Packages are Available
Designed for 2.0 V to 5.5 V VCC Operation; High Speed: tPD = 3.5ns (Typ) at V CC = 5V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; CMOS-Compatible Outputs: VOH > 0.8VCC ; VOL < 0.1VCC @Load; Power Down Protection Provided on Inputs and Outputs; Balanced Propagation Delays; Pin and Function Compatible with Other Standard Logic Families; Chip Complexity: FETs = ≤ 100; Pb-Free Packages are Available
Pin and Function Compatible with Other Standard Logic Families; Balanced Propagation Delays; Power Down Protection Provided on Inputs and Outputs; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; High Speed: tPD = 3.5ns (Typ) at V CC = 5V; CMOS-Compatible Outputs: VOH > 0.8VCC ; VOL < 0.1VCC @Load; Chip Complexity: FETs = ≤ 100; Pb-Free Packages are Available; Designed for 2.0 V to 5.5 V VCC Operation
SC-88A, 5 PIN
TSOP-5
Use the download button to access the M74VHC1GT125DT1G schematic symbol, PCB footprint, and 3D model.
SC-88A, 5 PIN
TSOP-5
5 PIN
Balanced Propagation Delays; Low Power Dissipation: ICC = 1µA (Max) at TA = 25°C; Pin and Function Compatible with Other Standard Logic Families; TTL-Compatible Inputs: VIL = 0.8V; VIH = 2.0V; CMOS-Compatible Outputs: VOH > 0.8VCC ; VOL < 0.1VCC @Load; Power Down Protection Provided on Inputs and Outputs; High Speed: tPD = 4.5ns (Typ) at VCC = 5V; Designed for 2.0 V to 5.5 V VCC Operation; Chip Complexity: FETs = ≤ 100; Pb-Free Packages are Available
Balanced Propagation Delays; High Speed: tPD = 3.5 ns (Typ) at VCC = 5 V; Pin and Function Compatible with Other Standard Logic Families; CMOS-Compatible Outputs: VOH > 0.8 VCC ; VOL < 0.1VCC @Load; Power Down Protection Provided on Inputs and Outputs; TTL-Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V; Low Power Dissipation: ICC = 1 µA (Max) at TA = 25°C; Chip Complexity: FETs = 65; Pb-Free Packages are Available; Designed for 2.0 V to 5.5 V Vcc Operation
Low Internal Power Dissipation: ICC = 1µA (Max) at TA = 25°C; Power Down Protection Provided on Inputs; Pin and Function Compatible with Other Standard Logic Families; Chip Complexity: FETs = <100; Pb-Free Packages are Available; Designed for 2.0 V to 5.5 V Vcc Operation Wide Operating Vcc Range; High Speed: tPD = 4.9ns (Typ) at VCC = 5V
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