Integrated Circuit

High Slew Rate: 13 V/µs; Large Output Voltage Swing: -14.7 V to +14 V (with +/-15 V Supplies); Excellent Gain Margin: 12 dB; Wide Bandwidth: 4.5 MHz; Fast Settling Time: 1.1 µs to 0.1%; Low Input Offset Voltage: 3.0 mV Maximum (A Suffix); Output Short Circuit Protection; Large Capacitance Drive Capability: 0 pF to 10,000 pF; Low Total Harmonic Distortion: 0.02%; Excellent Phase Margin: 60° Wide Input Common Mode Voltage Range: Includes Ground (VEE); Wide Single Supply Operation: 3.0 V to 44 V

Low Standby Current; Output Voltage Adjustable; Precision 2% Reference; Operation from 3.0 V to 40 V Input; Current Limiting; Frequency Operation to 100 kHz; Output Switch Current to 1.5 A; MC34063A = 0 to +70℃; MC33063A = -40 to +85℃; MC33063AV / NCV33063A = -40 to +125℃; 4x4mm DFN package option

DIP-8

DIP-8

High Slew Rate: 13 V/µs; Large Output Voltage Swing: -14.7 V to +14 V (with +/-15 V Supplies); Excellent Gain Margin: 12 dB; Wide Bandwidth: 4.5 MHz; Fast Settling Time: 1.1 µs to 0.1%; Low Input Offset Voltage: 3.0 mV Maximum (A Suffix); Output Short Circuit Protection; Large Capacitance Drive Capability: 0 pF to 10,000 pF; Low Total Harmonic Distortion: 0.02%; Excellent Phase Margin: 60° Wide Input Common Mode Voltage Range: Includes Ground (VEE); Wide Single Supply Operation: 3.0 V to 44 V

Comparator Hysteresis Prevents Erratic Reset; Low Standby Current; Internal Clamp Diode for Discharging Delay Capacitor; Trimmed-In-Package Temperature Compensated Reference; Comparator Threshold of 4.6 V at 25° C; Guaranteed Reset Operation with 1.0 V Input; Economical TO-226AA, SO-8, Micro-8 and SOT-23/TSOP-5 Surface Mount Packages; Reset Output Capable of Sinking in Excess of 10 mA; Precise Comparator Thresholds Guaranteed Over Temperature; Pb-Free Packages are Available

Use the download button to access the MC33064DM-5R2G schematic symbol, PCB footprint, and 3D model.

Low Standby Current; Output Voltage Adjustable; Precision 2% Reference; Operation from 3.0 V to 40 V Input; Current Limiting; Frequency Operation to 100 kHz; Output Switch Current to 1.5 A; MC34063A = 0 to +70℃; MC33063A = -40 to +85℃; MC33063AV / NCV33063A = -40 to +125℃; 4x4mm DFN package option

Low Standby Current; Output Voltage Adjustable; Precision 2% Reference; Operation from 3.0 V to 40 V Input; Current Limiting; Frequency Operation to 100 kHz; Output Switch Current to 1.5 A; MC34063A = 0 to +70℃; MC33063A = -40 to +85℃; MC33063AV / NCV33063A = -40 to +125℃; 4x4mm DFN package option

Low Standby Current; Output Voltage Adjustable; Precision 2% Reference; Operation from 3.0 V to 40 V Input; Current Limiting; Frequency Operation to 100 kHz; Output Switch Current to 1.5 A; MC34063A = 0 to +70℃; MC33063A = -40 to +85℃; MC33063AV / NCV33063A = -40 to +125℃; 4x4mm DFN package option

Low Standby Current; Output Voltage Adjustable; Precision 2% Reference; Operation from 3.0 V to 40 V Input; Current Limiting; Frequency Operation to 100 kHz; Output Switch Current to 1.5 A; MC34063A = 0 to +70℃; MC33063A = -40 to +85℃; MC33063AV / NCV33063A = -40 to +125℃; 4x4mm DFN package option

TTL Compatible Inputs With Hysteresis; Operation Down to 5.5 V for Direct Powering from MC33035 Reference; Digital Detection of Each Input Transition for Improved Low Speed Motor Operation; Internal Shunt Regulator Allows Operation from a Non-Regulated Voltage Source; Inverter Output for Easy Conversion between 60°/300° and 120° /240° Sensor Phasing Conventions; Pb-Free Packages are Available

SOIC-14

Obsolete - Operational Amplifier, Single Supply, Quad

SOIC-14

Timing from Microseconds through Hours; Adjustable Duty Cycle; High Current Output Can Source or Sink 200 mA; Temperature Stability of 0.005% per °C; Normally ON or Normally OFF Output; Output Can Drive TTL; Operates in Both Astable and Monostable Modes; Direct Replacement for NE555 Timers; Pb-Free Packages are Available

Obsolete - Brushless DC Motor Controller, 3-Phase

Obsolete - Comparator, Quad, Single Supply

SOIC-14

SOIC-14

Double Diode Protection on All Inputs; For Greater Hysteresis, Use MC14106B which is Pin-for-Pin Replacement for CD40106B and MM74Cl4; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load over the Rated Temperature Range; Can Be Used to Replace MC14069UB; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Pb-Free Packages are Available*

SOIC-16

NAND Output Pin Adjacent to Inverter Input Pin For AND Application; Supply Voltage Range = 3.0 Vdc to 18 Vdc; NOR Output Pin Adjacent to Inverter Input Pin For OR Application; Single Supply Operation; Capable of Driving Two Low-power TTL Loads or One Low-Power Schottky TTL Load over the Rated Temperature Range; NOR Input Pin Adjacent to VSS Pin to Simplify Use As An Inverter; NAND Input Pin Adjacent to VDD Pin to Simplify Use As An Inverter; Diode Protection on All Inputs; Pb-Free Packages are Available

Double Diode Protection on All Inputs; For Greater Hysteresis, Use MC14106B which is Pin-for-Pin Replacement for CD40106B and MM74Cl4; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load over the Rated Temperature Range; Can Be Used to Replace MC14069UB; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Pb-Free Packages are Available*

SOIC-16

Diode Protection on All Inputs; All Outputs Buffered; Active High or Active Low Outputs; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Capable of Driving Two Low-Power TTL Loads or One Low-Power Schottky TTL Load Over the Rated Temperature Range; Expandable; Pb-Free Packages are Available

Double Diode Protection on All Inputs; For Greater Hysteresis, Use MC14106B which is Pin-for-Pin Replacement for CD40106B and MM74Cl4; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load over the Rated Temperature Range; Can Be Used to Replace MC14069UB; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Pb-Free Packages are Available*

Analog Voltage Range (VDD - VEE) = 3.0 to 18 V Note: VEE must be less than or equal to VSS; Low Noise - 12 nVW sq. root Cycle, f is greater than or equal to 1.0 kHz typical; Switch Function is Break Before Make; Triple Diode Protection on All Control Inputs; Linearized Transfer Characteristics; For Low RON, Use The HC4051, HC4052, or HC4053 High-Speed CMOS Devices; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Pb-Free Packages are Available

Blanking Input; Readout Blanking on All Illegal Input Combinations; Direct LED (Common Anode or Cathode) Driving Capability; Chip Complexity: 207 FETs or 52 Equivalent Gates; Pin-for-Pin Replacement for CD4056A (with Pin 7 Tied to VSS).; Latch Storage of Code; Capable of Driving Two Low-power TTL Loads, One Low-power Schottky TTL Load or Two HTL Loads Over the Rated Temperature Range; Supply Voltage Range = 3.0 V to 18 V; Pb-Free Packages are Available

Pulse Width Range = 10 ms to 10 s; Latched Trigger Inputs; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range; Unlimited Rise and Fall Time Allowed on the A Trigger Input; Pin-for-pin Compatible with MC14528B and CD4528B (CD4098); Use the MC54/74HC4538A for Pulse Widths Less Than 10 ms with Supplies Up to 6 V.; 3.0 Vdc to 18 Vdc Operational Limits; Separate Latched Reset Inputs; Triggerable from Positive (A Input) or Negative-Going Edge (B-Input);

Supply Voltage Range = 3.0 Vdc to 18 Vdc with Auto Reset Disabled (Pin 5 = VDD) 8.5 Vdc to 18 Vdc with Auto Reset Enabled (Pin 5 = VSS); Built-in Low Power RC Oscillator (+/- 2% accuracy over temperature range and +/- 20% supply and +/- 3% over processing at < 10 kHz); Available Outputs 28, 210, 213 or 216; Q/Qbar Select Provides Output Logic Level Flexibility; Clock Conditioning Circuit Permits Operation with Very Slow Clock Rise and Fall Times; Reset (auto or master) Disables Oscillator During Resetting t

Diode Protection on All Inputs; Capable of Driving Two Low-power TTL Loads or One Low-Power Schottky TTL Load over the Rated Temperature Range; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Pb-Free Packages are Available

On-Chip RC Oscillator Provisions; 8-Bypass Input Allows Bypassing of First Eight Stages; Clock Inhibit and Oscillator Inhibit Inputs; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range; Clock Conditioning Circuit Permits Operation With Very Long Rise and Fall Times; Last 16 Stages Selectable By Four-Bit Select Code; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Set and Reset Inputs; Test Mode Allows Fast Test Sequence; 24 Flip-Flop Stages - Will Count

Use the download button to access the MC14520BDWG schematic symbol, PCB footprint, and 3D model.

This part should only be used in new designs where the pulse width is < 10 µs. Note: For designs requiring a pulse width > 10 µs, please see the MC14538, which is pin-for-pin compatible.; Separate Reset Available; Triggerable from Leading or Trailing Edge Pulse; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Diode Protection on All Inputs; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range; Pb-Free Packages are Available

Supply Voltage Range = 3.0 Vdc to 18 Vdc with Auto Reset Disabled (Pin 5 = VDD) 8.5 Vdc to 18 Vdc with Auto Reset Enabled (Pin 5 = VSS); Built-in Low Power RC Oscillator (+/- 2% accuracy over temperature range and +/- 20% supply and +/- 3% over processing at < 10 kHz); Available Outputs 28, 210, 213 or 216; Q/Qbar Select Provides Output Logic Level Flexibility; Clock Conditioning Circuit Permits Operation with Very Slow Clock Rise and Fall Times; Reset (auto or master) Disables Oscillator During Resetting t

Supply Voltage Range = 3.0 Vdc to 18 Vdc; Single Pin Reset; Diode Protection on All Inputs; Capable of Driving Two Low-Power TTL Loads or One Low-Power Schottky Load Over the Rated Temperature Range; Asynchronous Preset Enable Operation; Internally Synchronous for High Speed; Logic Edge-Clocked Design - Count Occurs on Positive Going Edge of Clock; Pb-Free Packages are Available

Pulse Width Range = 10 ms to 10 s; Latched Trigger Inputs; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range; Unlimited Rise and Fall Time Allowed on the A Trigger Input; Pin-for-pin Compatible with MC14528B and CD4528B (CD4098); Use the MC54/74HC4538A for Pulse Widths Less Than 10 ms with Supplies Up to 6 V.; 3.0 Vdc to 18 Vdc Operational Limits; Separate Latched Reset Inputs; Triggerable from Positive (A Input) or Negative-Going Edge (B-Input);

This part should only be used in new designs where the pulse width is < 10 µs. Note: For designs requiring a pulse width > 10 µs, please see the MC14538, which is pin-for-pin compatible.; Separate Reset Available; Triggerable from Leading or Trailing Edge Pulse; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Diode Protection on All Inputs; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range; Pb-Free Packages are Available

Use the download button to access the MC14512BDG schematic symbol, PCB footprint, and 3D model.

SOP-24

Output Transitions Occur on the Rising Edge of the Clock Pulse; Diode Protection on All Inputs; Exceedingly Slow Input Transition Rates May Be Applied to the Clock Input; 3-State Output at 64th-Bit Allows Use in Bus Logic Applications; Shift Registers of any Length may be Fully Loaded with 16 Clock Pulses; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range; Fully Static Operation; Pb-Free Packages are Avail

Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Internally Synchronous for High Internal and External Speeds; Logic Edge-Clocked Design Incremented on Positive Transition of Clock or Negative Transition on Enable; Diode Protection on All Inputs

3 to 18 Vdc Operation for VDD and VCC; No Sequencing Required on Power Supplies or Inputs for Power Up or Power Down; Input Threshold Can Be Shifted for TTL Compatibility; UP Translates from a Low to a High Voltage or DOWN Translates from a High to a Low Voltage; Diode Protected Inputs to VSS; Capable of Driving Two Low-Power TTL Loads or One Low-Power Schottky TTL Load Over the Rated Temperature Range; Pb-Free Packages are Available*

Two Disable Controls for Added Versatility; TTL Compatible - Will Drive One TTL Load Over Full Temperature Range; 3-State Outputs; Pin for Pin Replacement for MM80C97 and 340097; Supply Voltage Range = 3.0 Vdc to 18 Vdc; Pb-Free Packages are Available

Chip Complexity: 216 FETs or 54 Equivalent Gates; High-Current Sourcing Outputs (Up to 25 mA); Latch Storage of Code; Time Share (Multiplexing) Facility; Lamp Test Provision; Low Logic Circuit Power Dissipation; Supply Voltage Range = 3.0 V to 18 V; Lamp Intensity Modulation Capability; Triple Diode Protection on all Inputs; Readout Blanking on all Illegal Input Combinations; Blanking Input; Capable of Driving Two Low-power TTL Loads, One Low-power Schottky TTL Load or Two HTL Loads Over the Rated Temperatu

3 to 18 Vdc Operation for VDD and VCC; No Sequencing Required on Power Supplies or Inputs for Power Up or Power Down; Input Threshold Can Be Shifted for TTL Compatibility; UP Translates from a Low to a High Voltage or DOWN Translates from a High to a Low Voltage; Diode Protected Inputs to VSS; Capable of Driving Two Low-Power TTL Loads or One Low-Power Schottky TTL Load Over the Rated Temperature Range; Pb-Free Packages are Available*

3 to 18 Vdc Operation for VDD and VCC; No Sequencing Required on Power Supplies or Inputs for Power Up or Power Down; Input Threshold Can Be Shifted for TTL Compatibility; UP Translates from a Low to a High Voltage or DOWN Translates from a High to a Low Voltage; Diode Protected Inputs to VSS; Capable of Driving Two Low-Power TTL Loads or One Low-Power Schottky TTL Load Over the Rated Temperature Range; Pb-Free Packages are Available*

Schmitt Trigger on Clock Input (Pin 7); Single Line Input, Debounces Both "Make" and "Break" Contacts; Chip Complexity: 546 FETs or 136.5 Equivalent Gates; Cascadable for Longer Time Delays; Supply Voltage Range = 3.0 V to 18 V; TTL Compatible Data Inputs/Outputs; Does Not Require "Form C" (Single Pole Double Throw) Input Signal; Internal Oscillator (R-C), or External Clock Source; Diode Protection on All Inputs; Can Be Used as a Digital Integrator, System Synchronizer, or Delay Line; Six Debouncers Per Pac

Supply Voltage Range = 3.0 Vdc to 18 Vdc; Diode Protection on All Inputs; All Inputs and Outputs Buffered; Capable of Driving Two Low-Power TTL Loads or One Low-Power Schottky TTL Load over the Rated Temperature Range; Static Operation; Functional Equivalent to TTL 74174; Pb-Free Packages are Available