TUSB1106PWR USB Transceiver Integration Guide for Embedded Designs (2026)
Application note for the TI TUSB1106PWR USB Full-Speed transceiver — when to use it, SIE interface, differential routing, ESD protection, and supply layout.
Last updated: April 2026
Bottom Line: When you need to add USB connectivity to a microcontroller or FPGA that lacks an integrated USB PHY, the TUSB1106PWR is TI's standard 3.3 V Full-Speed (12 Mbps) and Low-Speed (1.5 Mbps) USB transceiver in a 16-pin TSSOP package. It pairs with an external Serial Interface Engine (SIE) — typically running on an MCU GPIO or an FPGA fabric — to provide the differential D+/D− line drivers, the 1.5 kΩ FS pull-up resistor, single-ended-zero detection, and suspend/resume timing that the USB 2.0 specification requires. Three design considerations dominate every TUSB1106 layout: (1) 90 Ω differential impedance for D+/D−, (2) ESD/EMI protection at the connector, and (3) clean 3.3 V supply isolation between the transceiver and the host MCU. This is a legacy-favorite for FPGA-based custom USB peripherals and 8051/PIC retrofit designs that don't have a native USB controller.
This application note explains when to use the TUSB1106, how to wire it to a MCU or FPGA, and the layout traps that turn a 12 Mbps link into an unreliable one.
When You Actually Need an External USB Transceiver
Most modern MCUs (STM32, ESP32, Atmel SAM, NXP Kinetis) include a native USB PHY — for those, an external transceiver is redundant and adds cost, board area, and signal-integrity risk. The TUSB1106 makes sense in three scenarios:
- FPGA-based custom USB devices — your FPGA has soft USB SIE logic but no analog PHY. The TUSB1106 provides the analog front end at minimal pin cost.
- Legacy 8-bit MCU retrofit — an existing 8051 / PIC / older AVR design needs USB connectivity added, but the MCU has only GPIO (no USB peripheral). Bit-banging USB Full-Speed via a TUSB1106 is feasible up to 12 Mbps if you commit ~30% of CPU cycles to the SIE software stack.
- Industrial isolation requirements — galvanically isolated USB endpoints (medical instruments, factory floor PCs) need a transceiver downstream of an isolator like the ISO7841 or ISO7242. The TUSB1106 sits on the isolated side of the digital crossing.
For new designs without these constraints, choose an MCU with native USB instead. The TUSB1106 is best understood as a maintenance/retrofit part, not a default greenfield choice.
Pinout and SIE Interface
The TUSB1106 in the PWR (TSSOP-14) package has 14 pins. The interface to your SIE is a 6-wire bus plus mode-control pins:
| Pin Group | Pins | Function |
|---|---|---|
| Power | VCC, GND | 3.0–3.6 V supply, ground |
| Differential bus | D+, D− | Connects directly to USB connector |
| SIE input (SIE → PHY) | VPO, VMO, OE | Driver inputs and output enable |
| SIE output (PHY → SIE) | VP, VM, RCV | Receiver outputs (single-ended and differential) |
| Mode | MODE, SPEED, SUSPND | Selects host/device, FS/LS, suspend behavior |
| Misc | RPU | 1.5 kΩ pull-up control for FS attach detection |
The SIE drives VPO/VMO with the differential data it wants to transmit, and asserts OE to put the transceiver into transmit mode. In receive mode, the transceiver drives VP/VM with the recovered differential data and RCV with the post-decoded NRZI bit. The SIE consumes these to clock the USB packet state machine.
For FPGA implementations, target a 48 MHz reference clock and oversample the receive path by 4× — this is the canonical Full-Speed sampling architecture used in OpenCores USB SIE projects and most commercial FPGA USB IP cores.
Differential Pair Routing for D+ and D−
USB Full-Speed signaling is differential at 12 Mbps with rise/fall times around 4–20 ns. The USB 2.0 specification requires 90 Ω ± 15% differential impedance on the D+/D− pair from the transceiver pins to the connector. Four routing rules cover most layouts:
- Pair length matching to ±0.1 mm. Differential timing skew above 100 ps causes EMI emissions that fail FCC Class B at the connector. Most layout tools auto-tune; verify with an impedance calculator using your stackup.
- Trace width and spacing per stackup. On a typical 4-layer board with 0.2 mm prepreg and 1 oz copper, 90 Ω diff requires ~0.18 mm trace width with 0.18 mm spacing. Use the Saturn PCB Toolkit or your fabricator's calculator for your specific stackup.
- Continuous reference plane underneath. The differential pair must run over an unbroken ground plane from the transceiver pins to the connector. A split or hatched plane introduces impedance discontinuities that cause reflections and signal-integrity failures.
- Avoid stubs and vias on the pair. Each via adds ~0.5 mm of stub if not back-drilled, which on a 12 Mbps signal is borderline acceptable but on a future 480 Mbps high-speed migration is a hard fail. Route on the same layer end-to-end.
ESD and EMI Protection at the Connector
USB connectors are exposed to ESD events from human contact (8 kV contact discharge per IEC 61000-4-2) and to RF coupling from the cable. The TUSB1106 itself has only ±2 kV HBM ESD rating on the D+/D− pins — well below what an exposed connector sees in production.
Required external protection:
- TVS array at the connector. The SN65220DBVR is TI's single-port USB ESD suppressor in SOT-23-5, providing ±15 kV contact ESD protection with low capacitance (3 pF) that doesn't degrade the 12 Mbps signal.
- Common-mode choke between the connector and the TUSB1106 transceiver. A 90 Ω @ 100 MHz CMC like the BLM21BB201SN1 (Murata) attenuates radiated EMI by 20–30 dB in the FCC Class B measurement band.
Without these two parts, an unprotected USB design will fail FCC/CE EMC testing on first sweep and risk silent transceiver damage from accumulated ESD events in the field.
Power Supply and Isolation Strategy
The TUSB1106 runs on 3.0–3.6 V, drawing typically 25 mA in active operation and ~50 µA in suspend. Three supply architectures are common:
- Self-powered design: VCC supplied from the local 3.3 V rail, no dependence on USB VBUS. The transceiver remains active even when USB is unplugged. Use this for instruments that operate independently of the USB host.
- Bus-powered design: VCC derived from the USB VBUS (5 V) through a 3.3 V LDO like the TLV70033DDCR. The transceiver only powers up when USB is connected. Use this for pure peripheral devices.
- Isolated design: VCC supplied from a transformer-driver-based isolated rail using the SN6505BDBVT and a small transformer. Use this for medical or industrial isolation requirements.
The TUSB1106 is sensitive to supply noise — high-frequency switching noise above 1 MHz on VCC modulates the differential drivers and shows up as transmitter jitter that fails USB-IF compliance testing. Add a 10 µF + 100 nF + 10 nF ceramic stack at the VCC pin and place a 0 Ω jumper or ferrite bead between the digital and analog supply domains.
Recommended Companion Parts
| Function | Part | Notes |
|---|---|---|
| USB Full-Speed transceiver | TUSB1106PWR | Default 12 Mbps PHY |
| USB Type-C config controller | TUSB320IRWBR | If you want USB-C connector with old PHY |
| USB 2.0 high-speed mux/switch | TS3USB221ARSER | Route between two USB ports |
| ESD suppressor | SN65220DBVR | Connector-side TVS |
| Isolated supply driver | SN6505BDBVT | For galvanically isolated USB |
For broader context on selecting between full-speed and high-speed USB designs, see our USB stack comparison guide which compares MCU-integrated USB ecosystems.
Common Pitfalls
- Routing D+/D− as a single-ended pair instead of as a controlled-impedance differential pair. Symptom: the device enumerates at room temperature but fails at temperature extremes. Always specify 90 Ω differential impedance to the fabricator.
- Skipping the SN65220DBVR ESD diode. Symptom: occasional in-field transceiver failures with no diagnostic trail. ESD events accumulate damage; the cumulative MTBF on an unprotected port is typically 6–18 months in industrial use.
- Sharing 3.3 V supply with high-speed digital logic. Symptom: USB transmitter jitter exceeds 200 ps and fails USB-IF compliance. Isolate VCC with a ferrite bead from the digital rail.
- Forgetting RPU for device mode. The 1.5 kΩ pull-up on D+ tells the host that a Full-Speed device is attached. If the SIE doesn't drive RPU correctly, the device never enumerates. Verify by checking the D+ voltage at idle: should read 3.0–3.6 V when attached, ground when detached.
- Using the TUSB1106 for a new high-bandwidth design. The 12 Mbps Full-Speed limit is too slow for video, mass storage, or modern peripherals. For new designs needing > 12 Mbps, use a native-USB MCU or a USB 2.0 Hi-Speed PHY like the USB3320.
FAQ
Why would I use a TUSB1106 in 2026 instead of a MCU with native USB? The TUSB1106 makes sense in three cases: (1) FPGA-based custom USB devices, (2) retrofitting USB connectivity onto a legacy 8-bit MCU, or (3) galvanically isolated USB endpoints. For greenfield designs with a modern MCU, choose one with integrated USB instead — it eliminates the analog routing, ESD, and supply-isolation work covered above.
Does the TUSB1106 support USB 2.0 High-Speed (480 Mbps)? No. The TUSB1106 supports only USB 1.1 / 2.0 Full-Speed (12 Mbps) and Low-Speed (1.5 Mbps). For High-Speed (480 Mbps) PHY you need a different transceiver class such as the USB3320 or USB3343.
What is the maximum cable length supported by the TUSB1106? USB 2.0 specification limits Full-Speed cable length to 5 m. The TUSB1106 itself meets the spec at the maximum length when the differential pair routing and ESD/EMI protection on the host PCB are correct. Cable extensions beyond 5 m require a hub.
How do I source the TUSB1106PWR during shortage? Submit an RFQ on FindMyChip — we cross-check live availability and lead times across 200+ verified distributors and return ranked sourcing options within 24 hours, with 5-point authentication on every shipment. For real-time stock checks on alternate USB transceivers, use our search index.
Is the TUSB1106 still in production? As of 2026, TI lists the TUSB1106PWR as Active in its product longevity program with no announced obsolescence. Lead times are typically 8–14 weeks through authorized distributors; allocation events have been rare since 2024.
Conclusion
The TUSB1106PWR remains the standard external USB Full-Speed transceiver for FPGA-based custom devices, legacy MCU retrofits, and galvanically isolated USB endpoints. Three design rules — controlled-impedance differential D+/D− routing, connector-side ESD protection with the SN65220, and clean 3.3 V supply isolation — cover 90% of layout failure modes. For greenfield designs without these specific constraints, an MCU with native USB is almost always a better choice; the TUSB1106 shines when you have an existing controller architecture that doesn't include a USB PHY.
Submit your RFQ to confirm pricing and stock across the TUSB1106 and SN65220 ESD families before locking your USB BOM.
